Abstract: A flip-chip assembly and method for reducing the stress in its metal interconnections resulting from thermal mismatch includes a detector that has a radiation sensitive circuit on a substrate that is flip-chip connected to a layer of semiconductor material that is provided with a readout circuit. The substrate has a thermal coefficient of expansion (TCE) greater than the semiconductor layer such that operating the detector over a predetermined temperature range would stress the flip-chip connections. A first compensation layer on the readout chip has a TCE greater than the substrate's, and a second compensation layer on the first layer has a TCE approximately equal to the semiconductor layer's. The materials and thicknesses of the compensation layers are selected such that the TCE of a composite structure that includes the semiconductor and compensation layers is approximately equal to the substrate's TCE to avoid the stress over the predetermined temperature range.