Abstract: A low profile integrated module is fabricated to include sheets of material, such as ceramic or PCB, fixed together and including a via extending through at least one of the plurality of sheets from the lower module surface partially to the upper module surface and in a side module surface. The via is filled with conductive material. The module is then mounted on a supporting substrate having a solder pad on the mounting surface with an area greater than the lower surface of the via. The lower surface of the via is positioned adjacent the upper surface of the mounting pad and soldered so that solder wicks up the via along the side module surface.

Abstract: A silicon carbide transistor (10) is formed from a silicon carbide film (14) that is formed on a silicon carbide substrate bulk (37). A conductor pattern layer (25) is formed on the silicon carbide film (14) and the silicon carbide film (14) removed from the silicon carbide substrate bulk (37) and attached to a substrate (11) of a dissimilar semiconductor material.

Abstract: A method of fabricating a semiconductor device on thinned wide bandgap material including providing a support having a planar surface and a semiconductor substrate. Implanting a layer of ions in the substrate to create a layer of microbubbles defining a thin film having a planar surface and a remaining mass separated by the layer of implanted ions. Intimately contacting the planar surface of the thin film to the planar surface of the support and heating the support and substrate to separate the remaining mass from the thin film. A semiconductor device is formed on the thin film, and the support is thinned.

Abstract: A semiconductor structure (20) includes a silicon layer (16) formed on an oxide layer (14). Gettering sinks (31, 32) are formed in the silicon layer (16). Lateral gettering is performed to effectively remove impurities from a first section (26) of the semiconductor layer (16). An insulated gate semiconductor device (40) is then formed in semiconductor layer (16), wherein a channel region (55) of the device (40) is formed in the first section (26) of the semiconductor layer (16). A gate dielectric layer (42) of the device (40) is formed over a portion of the first section (26) after the lateral gettering process, thereby enhancing the integrity of the gate dielectric layer (42).

Abstract: A mesa Zener diode is described which is manufactured by ion implanting a region of opposite conductivity into a substrate; etching a moat in a surface of the substrate through the region of opposite conductivity; depositing an oxide layer having an opening exposing a portion of the mesa; and depositing top and bottom metals.