Patents by Inventor Thomas Allen Spargo

Thomas Allen Spargo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Complex layout-based topological data analysis of analog netlists to extract hierarchy and functionality
    Patent number: 9367659
    Abstract: A system and method for reverse synthesizing an integrated circuit from a netlist. A netlist extracted from a device under review is received and converted to a connected graph. Blocks of cells are identified within the connected graph and a circuit model is formed from the blocks of cells, wherein forming includes iteratively building more complex blocks of cells from simpler blocks of cells.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: June 14, 2016
    Assignee: Raytheon Company
    Inventors: Parviz Saghizadeh, Thomas Allen Spargo, Robert T. Narumi, Mark W. Redekopp
  • COMPLEX LAYOUT-BASED TOPOLOGICAL DATA ANALYSIS OF ANALOG NETLISTS TO EXTRACT HIERARCHY AND FUNCTIONALITY
    Publication number: 20150100928
    Abstract: A system and method for reverse synthesizing an integrated circuit from a netlist. A netlist extracted from a device under review is received and converted to a connected graph. Blocks of cells are identified within the connected graph and a circuit model is formed from the blocks of cells, wherein forming includes iteratively building more complex blocks of cells from simpler blocks of cells.
    Type: Application
    Filed: August 7, 2014
    Publication date: April 9, 2015
    Inventors: Parviz Saghizadeh, Thomas Allen Spargo, Robert T. Narumi, Mark W. Redekopp