Patents by Inventor Thomas Antisseril

Thomas Antisseril has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bowtie and T-shaped structures of L-shaped mesh implementation
    Patent number: 6835972
    Abstract: A multiple layer power mesh design includes an L-shaped structure and a bow tie-shaped structure. The L-shaped structure provides a plurality of L-shaped power rails in each of four quadrants of the layer. The bow tie-shaped structure includes plurality of vertical power rails in each of a left and right triangularly-shaped portion of the layer. The vertical power rails of the bow tie-shaped structure provide and interface between the upper and lower quadrants of the L-shaped layer. The bow tie-shaped structure provides additional available space which can, for example, be used for routing signal traces. A T-shaped structure is also provided for use with the bow tie-shaped layer. The T-shaped layer provides for improved distances between the VDD and the VSS power rails.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: December 28, 2004
    Assignee: LSI Logic Corporation
    Inventors: Radoslav Ratchkov, Thomas Antisseril, Hiroshi Ishikawa, Prasad Subbarao, Bo Shen, Ruben Molina
  • Donut power mesh scheme for flip chip package
    Patent number: 6781228
    Abstract: A multiple layer mesh design which includes a layer which provides a vertical mesh and an adjacent layer which provides a horizontal mesh which includes an open area or hole. The layer which provides the horizontal mesh (with hole) may either be above or below the vertical mesh layer, depending on the design. The vertical mesh may be full or may surround an open area or hole where the design includes both a horizontal donut mesh and a vertical donut mesh.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: August 24, 2004
    Assignee: LSI Logic Corporation
    Inventors: Hiroshi Ishikawa, Thomas Antisseril, Radoslav Ratchkov, Bo Shen, Prasad Subbarao, Maad Al-Dabagh, Anwar Ali, Benjamin Mbouombouo
  • Donut power mesh scheme for flip chip package
    Publication number: 20040135263
    Abstract: A multiple layer mesh design which includes a layer which provides a vertical mesh and an adjacent layer which provides a horizontal mesh which includes an open area or hole. The layer which provides the horizontal mesh (with hole) may either be above or below the vertical mesh layer, depending on the design. The vertical mesh may be full or may surround an open area or hole where the design includes both a horizontal donut mesh and a vertical donut mesh.
    Type: Application
    Filed: January 10, 2003
    Publication date: July 15, 2004
    Inventors: Hiroshi Ishikawa, Thomas Antisseril, Radoslav Ratchkov, Bo Shen, Prasad Subbarao, Maad Al-Dabagh, Anwar Ali, Benjamin Mbouombouo
  • Bowtie and T-shaped structures of L-shaped mesh implementation
    Publication number: 20040129955
    Abstract: A multiple layer power mesh design includes an L-shaped structure and a bow tie-shaped structure. The L-shaped structure provides a plurality of L-shaped power rails in each of four quadrants of the layer. The bow tie-shaped structure includes plurality of vertical power rails in each of a left and right triangularly-shaped portion of the layer. The vertical power rails of the bow tie-shaped structure provide and interface between the upper and lower quadrants of the L-shaped layer. The bow tie-shaped structure provides additional available space which can, for example, be used for routing signal traces. A T-shaped structure is also provided for use with the bow tie-shaped layer. The T-shaped layer provides for improved distances between the VDD and the VSS power rails.
    Type: Application
    Filed: May 9, 2003
    Publication date: July 8, 2004
    Inventors: Radoslav Ratchkov, Thomas Antisseril, Hiroshi Ishikawa, Prasad Subbarao, Bo Shen, Ruben Molina
  • TERMINATION RING FOR INTEGRATED CIRCUIT
    Publication number: 20040124521
    Abstract: A rectangular termination ring for a power distribution mesh is placed on the upper two layers of an integrated circuit and may be placed over some I/O circuitry. The strapping connecting the bonding pads to the termination ring are placed on upper levels of the integrated circuit, minimizing the via requirements and freeing space for additional circuitry. Further, the termination ring may be adapted to work in conjunction with L-shaped, as well as other power distribution meshes.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Maad Al-Dabagh, Thomas Antisseril, Bo Shen, Prasad Subbarao, Radoslav Ratchkov
  • Termination ring for integrated circuit
    Patent number: 6747349
    Abstract: A rectangular termination ring for a power distribution mesh is placed on the upper two layers of an integrated circuit and may be placed over some I/O circuitry. The strapping connecting the bonding pads to the termination ring are placed on upper levels of the integrated circuit, minimizing the via requirements and freeing space for additional circuitry. Further, the termination ring may be adapted to work in conjunction with L-shaped, as well as other power distribution meshes.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: June 8, 2004
    Assignee: LSI Logic Corporation
    Inventors: Maad Al-Dabagh, Thomas Antisseril, Bo Shen, Prasad Subbarao, Radoslav Ratchkov