Patents by Inventor Thomas Bemmerl

Thomas Bemmerl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12334405
    Abstract: An electronic device and method is disclosed. In one example, the electronic device includes a solderable surface and at least one surface opening arranged in the solderable surface. The electronic device further includes an encapsulation material, encapsulating at least one electronic component of the electronic device, and at least one vent opening arranged in an area of the surface opening and extending through the encapsulation material.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: June 17, 2025
    Assignee: Infineon Technologies AG
    Inventors: Michael Stadler, Thomas Bemmerl
  • Publication number: 20250022780
    Abstract: A semiconductor device includes an encapsulation material at least partially encapsulating a semiconductor component of the semiconductor device. The semiconductor device further includes a lead protruding out of the encapsulation material and extending along a longitudinal axis, the lead comprising a twisted section along which the lead is twisted around the longitudinal axis. The twisted section of the lead is encapsulated in the encapsulation material, or the twisted section of the lead is external to the encapsulation material and provides an increased clearance distance between a residual dambar portion of the lead and an adjacent lead.
    Type: Application
    Filed: July 10, 2024
    Publication date: January 16, 2025
    Inventor: Thomas Bemmerl
  • Publication number: 20240347427
    Abstract: A leadframe is disclosed. In one example, the leadframe comprises a die pad and a first lead comprising an inner portion and an external portion. The first lead comprises at least one elevation portion extending over a predetermined length in a longitudinal or lateral direction of the first lead. The external portion is configured to be used for external electrical connection. In another example, a semiconductor package having a leadframe is disclosed.
    Type: Application
    Filed: March 7, 2024
    Publication date: October 17, 2024
    Applicant: Infineon Technologies AG
    Inventors: Edward FÜRGUT, Teck Sim LEE, Guey Yong CHEE, Thai Kee GAN, Thomas BEMMERL, Markus FINK
  • Publication number: 20240186225
    Abstract: A method of fabricating a semiconductor device package includes: providing a die carrier; disposing at least one semiconductor die on the die carrier, the semiconductor die comprising at least one contact pad on a main face remote from the carrier; electrically connecting the semiconductor die or another electrical device with an electrical connector; applying an encapsulant above the semiconductor die, the die carrier, and the electrical connector; and screwing a metallic drilling screw through the encapsulant so that an end of the drilling screw contacts the electrical connector.
    Type: Application
    Filed: February 15, 2024
    Publication date: June 6, 2024
    Inventors: Thorsten Scharf, Thomas Bemmerl, Martin Gruber, Thorsten Meyer, Frank Singer
  • Patent number: 11955415
    Abstract: The semiconductor device package comprises a die carrier, at least one semiconductor die disposed on the carrier, the semiconductor die comprising at least one contact pad on a main face remote from the carrier, an encapsulant disposed above the semiconductor die, an electrical connector electrically connected with the contact pad, a drilling screw screwed through the encapsulant and connected with the electrical connector.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: April 9, 2024
    Assignee: Infineon Technologies Austria AG
    Inventors: Thorsten Scharf, Thomas Bemmerl, Martin Gruber, Thorsten Meyer, Frank Singer
  • Patent number: 11869830
    Abstract: A clip, a semiconductor package, and a method are disclosed. In one example the clip includes a die attach portion having a first main face and a second main face opposite to the first main face, and at least one through-hole extending between the first and second main faces and including a curved transition from an inner wall of the at least one through-hole to the first main face.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: January 9, 2024
    Assignee: Infineon Technologies AG
    Inventors: Michael Stadler, Thomas Bemmerl
  • Patent number: 11869865
    Abstract: A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: January 9, 2024
    Assignee: Infineon Technologies AG
    Inventors: Thomas Bemmerl, Chooi Mei Chong, Edward Myers, Michael Stadler
  • Patent number: 11862582
    Abstract: A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, an encapsulant encapsulating at least part of the electronic component and at least part of the carrier and having a bottom side at a first vertical level. At least one lead is electrically coupled with the electronic component and comprising a first lead portion being encapsulated in the encapsulant and a second lead portion extending out of the encapsulant at the bottom side of the encapsulant. A functional structure at the bottom side extends up to a second vertical level different from the first vertical level.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: January 2, 2024
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Meyer, Thomas Bemmerl, Martin Gruber, Martin Richard Niessner
  • Publication number: 20230420317
    Abstract: An electronic device and method is disclosed. In one example, the electronic device includes a solderable surface and at least one surface opening arranged in the solderable surface. The electronic device further includes an encapsulation material, encapsulating at least one electronic component of the electronic device, and at least one vent opening arranged in an area of the surface opening and extending through the encapsulation material.
    Type: Application
    Filed: June 20, 2023
    Publication date: December 28, 2023
    Applicant: Infineon Technologies AG
    Inventors: Michael STADLER, Thomas BEMMERL
  • Publication number: 20230095545
    Abstract: A semiconductor package includes a leadframe including a diepad and a first row of leads, wherein at least one lead of the first row of leads is physically separated from the diepad by a gap. The semiconductor package further includes a semiconductor component arranged on the leadframe. The semiconductor package further includes an encapsulation material encapsulating the leadframe and the semiconductor component, wherein the encapsulation material includes a bottom surface arranged at a bottom surface of the semiconductor package, a top surface and a side surface extending from the bottom surface to the top surface. A side surface of at least one lead of the first row of leads is flush with the side surface of the encapsulation material. The flush side surface of the at least one lead is covered by an electroplated metal coating.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 30, 2023
    Inventors: Paul Armand Calo, Thomas Bemmerl, Joo Ming Goa, Edward Myers, Wee Boon Tay, Stefan Macheiner, Markus Dinkel, Andreas Piller
  • Publication number: 20220165687
    Abstract: A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, an encapsulant encapsulating at least part of the electronic component and at least part of the carrier and having a bottom side at a first vertical level. At least one lead is electrically coupled with the electronic component and comprising a first lead portion being encapsulated in the encapsulant and a second lead portion extending out of the encapsulant at the bottom side of the encapsulant. A functional structure at the bottom side extends up to a second vertical level different from the first vertical level.
    Type: Application
    Filed: October 15, 2021
    Publication date: May 26, 2022
    Applicant: Infineon Technologies AG
    Inventors: Thorsten MEYER, Thomas BEMMERL, Martin GRUBER, Martin Richard NIESSNER
  • Publication number: 20220005755
    Abstract: The semiconductor device package comprises a die carrier, at least one semiconductor die disposed on the carrier, the semiconductor die comprising at least one contact pad on a main face remote from the carrier, an encapsulant disposed above the semiconductor die, an electrical connector electrically connected with the contact pad, a drilling screw screwed through the encapsulant and connected with the electrical connector.
    Type: Application
    Filed: June 28, 2021
    Publication date: January 6, 2022
    Inventors: Thorsten Scharf, Thomas Bemmerl, Martin Gruber, Thorsten Meyer, Frank Singer
  • Publication number: 20210358877
    Abstract: A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.
    Type: Application
    Filed: July 30, 2021
    Publication date: November 18, 2021
    Inventors: Thomas Bemmerl, Chooi Mei Chong, Edward Myers, Michael Stadler
  • Patent number: 11088105
    Abstract: A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: August 10, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thomas Bemmerl, Chooi Mei Chong, Edward Myers, Michael Stadler
  • Patent number: 11069600
    Abstract: A semiconductor package includes a die pad having a die attach surface, a rear surface opposite the die attach surface, and an outer edge side extending between the die attach surface and the rear surface, the outer edge side having a step-shaped profile, wherein an upper section of the die pad laterally overhangs past a lower section of the die pad, a semiconductor die mounted on the die attach surface and having a first electrical terminal on an upper surface of the semiconductor die, and a first conductive clip that directly electrically contacts the first electrical terminal and wraps around the outer edge side of the die pad such that a section of the first conductive clip is at least partially within an area that is directly below the upper section of the die pad and directly laterally adjacent to the lower section.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: July 20, 2021
    Assignee: Infineon Technologies AG
    Inventors: Ke Yan Tean, Thomas Bemmerl, Thai Kee Gan, Azlina Kassim
  • Patent number: 10978378
    Abstract: A leadless package includes an at least partially electrically conductive carrier having a mounting section and a lead section, an electronic chip mounted on the mounting section, and an encapsulant at least partially encapsulating the electronic chip and partially encapsulating the carrier so that at least part of an interior sidewall of the lead section not forming part of an exterior sidewall of the package is exposed.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: April 13, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thomas Bemmerl, Kuok Wai Chan, Christoph Liebl, Bun Kian Tay, Wee Boon Tay, Wae Chet Yong
  • Patent number: 10971457
    Abstract: A semiconductor device is disclosed. In one example, the semiconductor device comprises a first semiconductor die comprising a first surface, a second surface opposite to the first surface, and a contact pad disposed on the first surface, a further contact pad spaced apart from the semiconductor die, a clip comprising a first layer of a first metallic material and a second layer of a second metallic material different from the first metallic material, wherein the first layer of the clip is connected with the contact pad, and the second layer of the clip is connected with the further contact pad.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: April 6, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thomas Bemmerl, Martin Gruber, Thorsten Scharf
  • Patent number: 10950509
    Abstract: A semiconductor device includes a first chip pad, a power semiconductor chip arranged on the first chip pad and including at least a first and a second power electrode, and a clip connected to the first power electrode. In this case, an integral part of the clip forms a shunt resistor and a first contact finger of the shunt resistor is embodied integrally with the clip.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 16, 2021
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Thomas Bemmerl, Steffen Thiele
  • Patent number: 10886186
    Abstract: A semiconductor package system comprises a semiconductor package and a cap. The semiconductor package comprises a die pad, a chip mounted or arranged to a first main face of the die pad and an encapsulation body encapsulating the chip and the die pad. The cap covers at least partly an exposed second main face of the die pad. The cap comprises a cap body of an electrically insulating and thermally conductive material and a fastening system fastening the cap to the semiconductor package. The fastening system extends from the cap body towards the encapsulation body or along a side surface of the semiconductor package.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: January 5, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Scharf, Ralf Otremba, Thomas Bemmerl, Irmgard Escher-Poeppel, Martin Gruber, Michael Juerss, Thorsten Meyer, Xaver Schloegel
  • Publication number: 20200373228
    Abstract: A semiconductor package includes a die pad having a die attach surface, a rear surface opposite the die attach surface, and an outer edge side extending between the die attach surface and the rear surface, the outer edge side having a step-shaped profile, wherein an upper section of the die pad laterally overhangs past a lower section of the die pad, a semiconductor die mounted on the die attach surface and having a first electrical terminal on an upper surface of the semiconductor die, and a first conductive clip that directly electrically contacts the first electrical terminal and wraps around the outer edge side of the die pad such that a section of the first conductive clip is at least partially within an area that is directly below the upper section of the die pad and directly laterally adjacent to the lower section.
    Type: Application
    Filed: May 24, 2019
    Publication date: November 26, 2020
    Inventors: Ke Yan Tean, Thomas Bemmerl, Thai Kee Gan, Azlina Kassim