Patents by Inventor Thomas Bollinger

Thomas Bollinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7538577
    Abstract: A mechanism within an electronic system for adapting a field programmable gate array (FPGA) to a flash memory device that supports a synchronous serial peripheral interface (SPI) by coupling a small amount of MSI logic with the FPGA and the flash memory device, to configure the FPGA to a designed configuration state. The system comprises a first and additional FPGAs that support a serial configuration interface, SPI flash memory, and a parallel-load 8-bit shift register. SPI flash memory is initialized with a first configuration data pattern that is read from SPI flash memory and applied to the FPGAs during a first device configuration process resulting in the FPGAs each attaining a designed configuration state. The SPI flash memory is subsequently initialized with a second configuration data pattern by means of the first FPGA. Each FPGA attains another distinct designed configuration state by a second device configuration process.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: May 26, 2009
    Inventor: Thomas Bollinger
  • Publication number: 20070007998
    Abstract: A mechanism within an electronic system for adapting a field programmable gate array (FPGA) to a flash memory device that supports a synchronous serial peripheral interface (SPI) by coupling a small amount of MSI logic with the FPGA and the flash memory device, to configure the FPGA to a designed configuration state. The system comprises a first and additional FPGAs that support a serial configuration interface, SPI flash memory, and a parallel-load 8-bit shift register. SPI flash memory is initialized with a first configuration data pattern that is read from SPI flash memory and applied to the FPGAs during a first device configuration process resulting in the FPGAs each attaining a designed configuration state. The SPI flash memory is subsequently initialized with a second configuration data pattern by means of the first FPGA. Each FPGA attains another distinct designed configuration state by a second device configuration process.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 11, 2007
    Inventor: Thomas Bollinger
  • Patent number: 6447543
    Abstract: The basket-like container (1) contains a reception volume for bone tissue. After the filling in of the bone tissue the container is implanted. The reception volume is located within a wall (2) which is arranged about an axis (10). This peripheral wall consists of a grid, a fabric or a mesh. Transversely to the axis the wall enables an X-ray optical seeing through of the unfilled reception volume. The surface component, which is permeable by X-rays, amounts to at least 30%.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: September 10, 2002
    Assignee: Sulzer Orthopedics Ltd.
    Inventors: Armin Studer, Thomas Bollinger