Abstract: An industrial locking switch comprises multiple locking tongue entry slots formed on adjacent sides of the locking switch housing, thereby supporting receipt of the corresponding locking tongue from multiple directions of approach without the need to mechanically modify the switch's head or to reorient the switch itself. The locking switch houses locking bolt detection circuity comprising multiple series connected RFID coils configured to detect an RFID tag mounted on the locking tongue when the locking tongue is inserted into any of the entry slots.

Abstract: An industrial locking switch comprises multiple locking tongue entry slots formed on adjacent sides of the locking switch housing, thereby supporting receipt of the corresponding locking tongue from multiple directions of approach without the need to mechanically modify the switch's head or to reorient the switch itself. The locking switch houses locking bolt detection circuity comprising multiple series connected RFID coils configured to detect an RFID tag mounted on the locking tongue when the locking tongue is inserted into any of the entry slots.

Abstract: A chopper-stabilized current-mode instrumentation amplifier comprises first and second input amplifiers coupled to respective input nodes and arranged to produce respective currents in response to a differential input voltage applied to the input nodes; the currents are coupled to an output node. To reduce gain errors that might otherwise arise due to the parasitic capacitances of the on- and/or off-chip devices and/or structures making up the input amplifiers, the invention includes gain correction circuitry coupled to the IA. The gain correction circuitry replicates at least some of the parasitic capacitances, and provides compensation currents to the IA which reduce both input- and output-referred gain errors that might otherwise arise.

Abstract: A chopper-stabilized current mirror includes a pair of FETs connected to mirror an input current Iin. In one embodiment, switching networks S1 and S2 have their respective inputs connected to the FETs' drains, and are operated with clock signals CLK1 and CLK2, respectively. An ro boost amplifier A12 has its inputs connected to the outputs of S2 and its outputs connected to the gates of a pair of cascode FETs via a switching network S3 which is operated with clock signal CLK2S, with the drain of one cascode FET connected to Iin and the drain of the other providing the mirror's output Iout. S1 is clocked to reduce mismatch errors and S2 and S3 are clocked to reduce errors due to A1's offset voltage, with CLK2 and CLK2S shifted with respect to CLK1 to reduce errors due to parasitic capacitances.

Abstract: A current-mode instrumentation amplifier (IA) includes first and second buffer amplifiers which receive a differential voltage (VINP?VINN) and provide output voltages at respective output nodes; a resistance R1 is connected between the nodes and conducts a current IR1 that varies with VINP?VINN. In one embodiment, each amplifier includes a transistor connected in series with R1 which conducts current IR1; these currents are coupled to the input and output terminals of a current mirror, preferably via respective virtual ground nodes such that the IA requires only one current mirror, to produce the IA's output voltage. To minimize DC mismatch errors, the IA is chopper-stabilized, with the buffer amplifiers and signal current paths chopped using a two-phase chopping cycle.