Patents by Inventor Thomas C. Brennan

Thomas C. Brennan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6260184
    Abstract: A system and method for designing an integrated circuit device by selectively reducing power lines based on wiring demand of the device are provided. In one embodiment, a power demand value of a region of the device is determined and a wiring demand value of the region of the device is determined. Based on the wiring demand value and the power demand Value, power lines in the region are selectively reduced. These steps may be repeated for each region of the device and a new power line layout may be generated after stepping through each of the regions. The reduction of power lines may be repeated until an acceptable power line layout is produced. Based on this layout, detailed signal wiring can be performed. This technique can, for example, more efficiently allocate power lines and signal wires and increase the density of the integrated circuit chip.
    Type: Grant
    Filed: October 20, 1998
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Thomas C. Brennan, Michael Rohn
  • Patent number: 6041169
    Abstract: A method, apparatus, and article of manufacture for performing timing analysis on an integrated circuit, which run a high level chip timing tool with initial RC delays for all nets of the integrated circuit; determine a list of time-critical nets from a timing report and obtain a full RC coupling network for each time-critical net; run a detailed circuit simulator on the full RC coupling network for each time-critical net to obtain actual RC delays for each time-critical net; determine a delta time for each time-critical net, based on a difference between the initial RC delay and the corresponding actual RC delay for each time-critical net; and rerun the high level chip timing tool, including the delta time for each time-critical net to obtain a timing analysis of the integrated circuit which accounts for signal to signal noise.
    Type: Grant
    Filed: August 21, 1997
    Date of Patent: March 21, 2000
    Assignee: International Business Machines Corporation
    Inventor: Thomas C. Brennan
  • Patent number: 5629857
    Abstract: A method and data processing system for graphically indicating a status of a circuit unit displayed within a circuit design on a display within a data processing system. The circuit unit displayed within the circuit design is selected, wherein the circuit unit is located at a location and has a first status. A movement of the selected circuit unit is detected. Whether the movement of the selected circuit unit changes the status of the selected circuit unit is determined. A status change of the selected circuit unit is automatically indicating by graphically indicating the status change in response to the change of status of the selected circuit unit, wherein the status of the selected circuit unit is dynamically indicated to a user in response to a movement of the selected circuit unit.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: May 13, 1997
    Assignee: International Business Machines Corporation
    Inventor: Thomas C. Brennan