Abstract: A programmable timer module (PTM) is provided as a component of a microprocessor system in order to generate and measure varying time intervals under program control. The programmable timer module includes, in one embodiment, three independent 16-bit timers. Each timer includes a 16-bit counter and a 16-bit latch. The programmable timer module also includes an 8-bit status register and an 8-bit control register each of which may be coupled to an 8-bit bidirectional data bus of a microprocessor system. Selection circuitry is provided which permits the microprocessor to select either the control register or the status register. Information can be written into the control register; the operation is effected by means of read/write circuitry and a read/write input. Any one of the three timers can also be selected by means of the selection circuitry, and a 16-bit number can be written into the selected 16-bit latch.

Abstract: An integrated circuit synchronous data adaptor (SSDA) provides a bidirectional interface for synchronous data interchange. Internal control and interface logic including first-in-first-out (FIFO) buffer memory enables simultaneous transmitting and receiving of standard synchronous communication characters to allow data transfer between serial data channels and the parallel bidirectional data bus of a bus organized system such as a microprocessor (MPU) system. Parallel data from the bus system is serially transmitted and received by the SSDA with synchronization character insertion and deletion, fill character insertion and deletion, parity generation and error checking. The functional configuration of the SSDA is programmed via the MPU system data bus during system initialization and can be reconfigured via program control during subsequent system operation.