Patents by Inventor Thomas Calvert

Thomas Calvert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250307172
    Abstract: Systems and methods for bypassing subsequent lookups in packet processing pipelines in which multiple circuit blocks includes pre-processing circuitry that determine keys based on parsed contents of packets, and that retrieve responses from respective look-up tables (LUTs) based on the keys. The LUT of a first one of the blocks may be programmed with keys and/or responses for other ones of the circuit blocks, and the first circuit block may provide the keys and/or responses in metadata of the packets. Alternatively, or additionally, the first circuit block may provide parsed contents of the packets in the metadata of the respective packets. The other circuit blocks may selectively bypass the respective pre-processing circuitry based on the metadata.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 2, 2025
    Inventors: Thomas CALVERT, Matthew SLATTERY
  • Publication number: 20250147799
    Abstract: A computer-implemented method for task management can include managing performance of a task on a message by a plurality of circuits. In some aspects, the task can comprise a sequence of processings to be performed on the message and each circuit of the plurality of circuits performing a processing of the sequence of processings. In some aspects, the method can include routing, based on the sequence, a first information regarding the task to a first circuit of the plurality of circuits to perform a first processing of the sequence of processings on the message; receiving, from the first circuit, an output of the first processing; and routing, based on the sequence of processings identified for the task, a second information regarding the task to a second circuit of the plurality of circuits to perform a second processing that follows the first processing in the sequence of processings.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 8, 2025
    Applicant: Xilinx, Inc.
    Inventors: Thomas Calvert, Ripduman Sohan, Dmitri Kitariev, Kimon Karras, Stephan Diestelhorst, Neil Turton, David Riddoch, Derek Roberts, Kieran Mansley, Steven Pope