Patents by Inventor Thomas Chung

Thomas Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11694841
    Abstract: A current transformer having a body having an upper half and a lower half hingedly connected to the upper half, a pair of ferrite cores located within one of the upper half and the lower half of the body, the pair of ferrite cores defining a gap formed between each ferrite core of the pair of ferrite cores, and a sensor located within the gap formed between each ferrite core of the pair of ferrite cores.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: July 4, 2023
    Assignee: Verdigris Technologies, Inc.
    Inventors: Thomas Chung, Jon Chu, Santo Ko, Danny Serven, Martin Chang, Jared Kruzek, Diego Torres, Sami Shad, Joe Phaneuf, Jacques Kvam, Anjali Sehrawat, Daniela Li, Michael Roberts, Jason Goldman
  • Patent number: 11204143
    Abstract: A solar disk light has a central body and an annular shelf surrounding the central body and attached to the central body by one or more struts, defining a gap between an inner surface of the annular shelf and the central body. LEDs are disposed on the annular shelf. The central body has solar cells for harvesting solar energy and detecting ambient light. The central body contains a rechargeable battery for storing harvested solar energy, a switch, and wiring and driver electronics for operably connecting the solar cells, battery, switch, and LEDs. A translucent shell is on the disk light body, covering the annular shelf and LEDs, such that light emitted by the LEDs shines through the shell. The shell has an opening for receiving the central body such that the solar cells are not covered by the shell, the shell having an inner wall received in the gap.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: December 21, 2021
    Assignee: E. Mishan & Sons, Inc.
    Inventors: Fred Hollinger, Robert Chung, Thomas Chung
  • Publication number: 20210142941
    Abstract: A current transformer having a body having an upper half and a lower half hingedly connected to the upper half, a pair of ferrite cores located within one of the upper half and the lower half of the body, the pair of ferrite cores defining a gap formed between each ferrite core of the pair of ferrite cores, and a sensor located within the gap formed between each ferrite core of the pair of ferrite cores.
    Type: Application
    Filed: August 9, 2018
    Publication date: May 13, 2021
    Inventors: Thomas CHUNG, Jon CHU, Santo KO, Danny SERVEN, Martin CHANG, Jared KRUZEK, Diego TORRES, Sami SHAD, Joe PHANEUF, Jacques KVAM, Anjali SEHRAWAT, Daniela LI, Michael ROBERTS, Jason GOLDMAN
  • Patent number: 10141440
    Abstract: Apparatus and associated methods relate to controlling an electric field profile within a drift region of an LDMOS device using biased field plates to deplete majority carriers from a drift region between a body/drift-region metallurgical junction and a drain contact. Such field plates are located in trenches that longitudinally extend within the drift region. Field plates are laterally spaced apart from each other at a distance that permits substantial depletion of majority carriers between adjacent field plates. Trenches have trench bottoms located within a drift-region/substrate metallurgical junction so as to permit substantial depletion of majority carriers between trench bottoms and the drift-region/substrate metallurgical junction. Between adjacent trenches, dopant concentrations can be increased up to a threshold that can be substantially depleted under specified bias conditions.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: November 27, 2018
    Assignee: Polar Semiconductor, LLC
    Inventors: Steven Kosier, Thomas Chung
  • Publication number: 20170263765
    Abstract: Apparatus and associated methods relate to controlling an electric field profile within a drift region of an LDMOS device using biased field plates to deplete majority carriers from a drift region between a body/drift-region metallurgical junction and a drain contact. Such field plates are located in trenches that longitudinally extend within the drift region. Field plates are laterally spaced apart from each other at a distance that permits substantial depletion of majority carriers between adjacent field plates. Trenches have trench bottoms located within a drift-region/substrate metallurgical junction so as to permit substantial depletion of majority carriers between trench bottoms and the drift-region/substrate metallurgical junction. Between adjacent trenches, dopant concentrations can be increased up to a threshold that can be substantially depleted under specified bias conditions.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 14, 2017
    Inventors: Steven Kosier, Thomas Chung
  • Publication number: 20170247340
    Abstract: Herein are provided, inter alia, compounds capable of modulating the level of activity of low molecular weight protein tyrosine phosphatase (LMPTP) and methods of using the same. In embodiments, the compound has a structure according to Formula (I-A).
    Type: Application
    Filed: October 14, 2015
    Publication date: August 31, 2017
    Inventors: Nunzio BOTTINI, Jiwen ZOU, Santhi R. GANJI, Stephanie STANFORD, Anthony PINKERTON, Thomas CHUNG, Michael HEDRICK, Robert ARDECKY
  • Patent number: 7476606
    Abstract: Ultra-high speed semiconductors that are usually very thin and therefore very fragile still require connection to a circuit board and a heat transfer pathway. Ultra-high speed circuits and semiconductor devices are provided with a carrier plate formed on the backside of a wafer or substrate by a variety of deposition methods. The carrier plate is a series of metal layers, each being selected to enable the attachment of a relatively thick copper carrier plate to the backside of the substrate or wafer.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: January 13, 2009
    Assignee: Northrop Grumman Corporation
    Inventors: Dean Tran, Alan Hirschberg, Ha K. DeMarco, Luis Rochin, Thomas Chung, Mark Kintis, Steven J. Mass
  • Publication number: 20070235744
    Abstract: Ultra-high speed semiconductors that are usually very thin and therefore very fragile still require connection to a circuit board and a heat transfer pathway. Ultra-high speed circuits and semiconductor devices are provided with a carrier plate formed on the backside of a wafer or substrate by a variety of deposition methods. The carrier plate is a series of metal layers, each being selected to enable the attachment of a relatively thick copper carrier plate to the backside of the substrate or wafer.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 11, 2007
    Inventors: Dean Tran, Alan Hirschberg, Ha DeMarco, Luis Rochin, Thomas Chung, Mark Kintis, Steven Mass
  • Publication number: 20070184285
    Abstract: Protection against x-ray radiation is provided by a thin layer of a zinc-based alloy. An electronics component housing and lid are made to include a base of a lightweight alloy, a thin coating of the zinc-based alloy and an exterior finish metal layer. The zinc-based alloy provides excellent radiation protection and other advantages, without a significant weight penalty.
    Type: Application
    Filed: February 8, 2006
    Publication date: August 9, 2007
    Inventors: Dean Tran, Thomas Chung, Alan Hirschberg, Luis Rochin, Mark Kintis
  • Publication number: 20070181809
    Abstract: A technique for providing high-contrast images of defects in semiconductor devices and arrays of such devices, by illuminating each semiconductor device under inspection with broadband infrared radiation, and then forming an image of radiation that is specularly reflected from the semiconductor device. Many semiconductor devices and arrays of such devices have a metal backing layer that specularly reflects the illumination back into an appropriately positioned and aligned camera, selected to be sensitive to infrared wavelengths at which the semiconductor device materials are relatively transparent.
    Type: Application
    Filed: February 6, 2006
    Publication date: August 9, 2007
    Inventors: Mau-Song Chou, Jonathan Arenberg, Mark Menard, Thomas Chung
  • Patent number: D714075
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: September 30, 2014
    Assignee: Umbra LLC
    Inventor: Thomas Chung
  • Patent number: D939124
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: December 21, 2021
    Assignee: E. MISHAN & SONS, INC.
    Inventors: Fred Hollinger, Robert Chung, Thomas Chung
  • Patent number: D1017864
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: March 12, 2024
    Assignee: E. MISHAN & SONS, INC.
    Inventors: Jeffrey Mishan, Fred Hollinger, Robert Chung, Thomas Chung