Patents by Inventor Thomas Cramer

Thomas Cramer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140163575
    Abstract: An orthopedic device for compressing or distracting bone parts includes an elongated body with two arms extending transversely away from the body. One arm is a stationary arm affixed to one end of the body and a second arm is a longitudinally movable. The two arms extend from the elongated body in the same direction and parallel to each other. The orthopedic device also includes a locking sleeve hingeably connected to the outer end of each of the first and second arms by a hinge joint, where each locking sleeve is configured for lockably receiving an elongated pin using a collet and a captured collet nut.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 12, 2014
    Applicant: WRIGHT MEDICAL TECHNOLOGY, INC.
    Inventors: Brian Thoren, Daniel McCormick, David Harness, Wesley Reed, Thomas Cramer, Gary Lowery
  • Publication number: 20130225603
    Abstract: Provided herein are pharmaceutical compositions for the treatment of various ocular diseases characterized by unwanted cellular proliferation. The pharmaceutical compositions may comprise one or more MDM2 inhibitors, and may further comprise one or more additional therapeutic agents. Also provided are methods of use of MDM2 inhibitors and/or formulations thereof for the treatment of ocular diseases characterized by unwanted cellular proliferation.
    Type: Application
    Filed: September 26, 2011
    Publication date: August 29, 2013
    Applicant: SERRATA LLC
    Inventors: Sai Chavala, Thomas Cramer Lee
  • Patent number: 7420427
    Abstract: A phase-locked loop (PLL) architecture (100) is provided that includes a voltage-controlled oscillator (VCO) (116). The PLL architecture (100) also includes a digital calibration loop (132) coupled to the VCO (116). The digital calibration loop (132) implements a digital filter (126) to provide a digital control to the VCO (116) for centering a VCO frequency output. The PLL architecture (100) also includes an analog calibration loop (130) coupled to the VCO (116). The analog calibration loop (130) provides an analog control to the VCO (116) for adjusting the centered VCO frequency output.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: September 2, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: James Easton Cameron Brown, Hans Thomas Cramer
  • Patent number: 5929649
    Abstract: The present method and apparatus for electrically characterizing a pin grid array includes a plurality of conductive caps which may be removably fitted over chosen pins of the pin grid array, and a conductive fixture having a plurality of passages therethrough which correspond to the pins of the pin grid array. The passages are sized so that the caps come in close proximity to the fixture with the fixture so positioned on the pin grid array, while each pin which does not have a cap thereon is not in contact with the fixture but defines an air gap with the fixture. Electrical probing may then take place between the fixture, which connects a number of pins through the caps, and a pin not in contact with the fixture to gain electrical characterization information of the pin grid array.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: July 27, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Hans Thomas Cramer