Patents by Inventor Thomas D. Kim

Thomas D. Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142790
    Abstract: Devices and methods are provided for performing color correction of focal dispersion in high-harmonic lenses. The device comprises a multi-order diffractive engineered surface (MODE) lens comprising a MODE primary lens having height transitions in the front surface that segment it into annular zones and a color corrector comprising a diffractive Fresnel lens (DFL). Polychromatic light passing through the MODE primary lens experiences LCA that is corrected by the color corrector. The color corrector can be configured to correct Type 1 LCA resulting from a combined effect of the DFL and a refractive index change versus wavelength associated with material comprising the device that together produce a change in focus of the polychromatic light, as well as Type 2 LCA resulting from a cyclic variation in focal length versus wavelength caused by the abrupt changes in the height of the front surface of the MODE primary lens at the transitions.
    Type: Application
    Filed: February 5, 2022
    Publication date: May 2, 2024
    Inventors: Thomas D. Milster, Young-Sik Kim, Zichan Wang
  • Patent number: 5341485
    Abstract: Dynamic address translation structures and procedures are capable of multiple address translations for the same processor in a single cycle. According to one approach, a plurality of directory look aside tables (DLATs) are used to provide multiple address translation. The DLATs are accessed in parallel by separate virtual address generators. To avoid the problem of generating the same address multiple times for each of the DLATs, a generated address for one DLAT may be written to all the DLATs or, alternatively, if a miss occurs in one DLAT, a search is made of the other DLATs before the address is generated. In the former case, an address written to all the DLATs may overwrite an address that will be needed for a future translation by one of the other DLATs. This is avoided in the latter case, but translations in other DLATs are interrupted when a miss occurs in one of the DLATs. This, in turn, may be avoided by employing "shadow" DLATs which are copies of the DLATs.
    Type: Grant
    Filed: May 7, 1991
    Date of Patent: August 23, 1994
    Assignee: International Business Machines Corporation
    Inventors: John R. Hattersley, Thomas D. Kim, Jeffery Y. Lee, Forrest A. Reiley
  • Patent number: 5278963
    Abstract: An address translation mechanism for generating real addresses, within a page. based on stride from a beginning translated address in the page. However, whenever there is a page crossing, an address must go to either the directory look aside table (DLAT) or buffer control element (BCE) to translate a virtual page-address to a real page-address. To avoid the delay this usually causes, the address translation request is sent out before the address is actually needed. This is done by predicting the next page-crossing while real addresses with the current page are being generated based on the stride value. The prediction is based on the stride value, operand size, and page mode.
    Type: Grant
    Filed: June 21, 1991
    Date of Patent: January 11, 1994
    Assignee: International Business Machines Corporation
    Inventors: John R. Hattersley, Thomas D. Kim