Abstract: A D-type, master/slave, flip-flop is described for use as a divide-by-2 frequency divider in which a frequency to be divided is input as a clock signal and the Q output is connected to the D input, and in which the master section and the slave section consist only of tracking means, latching being effected by using potentials established on tracking transistors of each section during the previous clock pulse.

Abstract: An oscillator of balanced design in which a resonant impedance network is connected between the control ports of two matched transistors, and a capacitance is connected in parallel, across the two inputs of these transistors. The inputs of the transistors are connected each to a matched current source. The signals at the transistor outputs are summed together at a common node. Signals of resonant frequency in each arm of the oscillator are equal in magnitude but opposite in phase. Signals at resonant frequency thus cancel whereas signals at the second harmonic frequency add constructively and are thus enhanced. The effect is a net frequency doubling. For high frequency operation, bipolar transistors are utilized. The current sources can be modulated and an IF mixer output derived. Signal of resonant frequency can be extracted and used for signal prescaling. In an equivalent arrangement, an inductance and resonant network replace the resonant network and capacitance just mentioned.