Abstract: A low-cost test system for testing digital circuit elements, such as a memory array, which includes a base to provide operating voltage and an operator interface in combination with interchangeable, removable test modules. Each test module includes a test function data processor, an address generator for selecting addresses to be tested, and a comparator for comparing actual output signals with the generated expected outputs. The test function data processor has a number of stages of high-speed memory and logic to generate independently test program data, test program expected data and test address control data.