Patents by Inventor Thomas Daugherty

Thomas Daugherty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170003463
    Abstract: Embodiments disclosed herein generally relate to a method for manufacturing a photonic device that facilitates precise alignment of a laser with a waveguide. The method generally includes disposing the laser on a support member on a substrate such that the laser contacts the support member. The support member may extend in a direction perpendicular to a base plane of the substrate, and solder may be disposed on the base plane such that a height of the solder in the direction perpendicular to the base plane is less than a height of the support member so that a gap is created between the solder and the laser. Once the laser has been properly aligned with the waveguide, the solder may be heated (e.g., reflowed) so that the solder contacts the laser.
    Type: Application
    Filed: July 2, 2015
    Publication date: January 5, 2017
    Inventors: Mary NADEAU, Thomas DAUGHERTY, Ravi Sekhar TUMMIDI, Vipulkumar PATEL
  • Patent number: 9343450
    Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: May 17, 2016
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Kalpendu Shastri, Vipulkumar Patel, Mark Webster, Prakash Gothoskar, Ravinder Kachru, Soham Pathak, Rao V. Yelamarty, Thomas Daugherty, Bipin Dama, Kaushik Patel, Kishor Desai
  • Publication number: 20140248723
    Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.
    Type: Application
    Filed: May 13, 2014
    Publication date: September 4, 2014
    Applicant: Cisco Technology, Inc.
    Inventors: Kalpendu SHASTRI, Vipulkumar PATEL, Mark WEBSTER, Prakash GOTHOSKAR, Ravinder KACHRU, Soham PATHAK, Rao V. YELAMARTY, Thomas DAUGHERTY, Bipin DAMA, Kaushik PATEL, Kishor DESAI
  • Patent number: 8803269
    Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: August 12, 2014
    Assignee: Cisco Technology, Inc.
    Inventors: Kalpendu Shastri, Vipulkumar Patel, Mark Webster, Prakash Gothoskar, Ravinder Kachru, Soham Pathak, Rao V. Yelamarty, Thomas Daugherty, Bipin Dama, Kaushik Patel, Kishor Desai
  • Publication number: 20120280344
    Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.
    Type: Application
    Filed: May 3, 2012
    Publication date: November 8, 2012
    Applicant: LIGHTWIRE LLC
    Inventors: Kalpendu Shastri, Vipulkumar Patel, Mark Webster, Prakash Gothoskar, Ravinder Kachru, Soham Pathak, Rao V. Yelamarty, Thomas Daugherty, Bipin Dama, Kaushik Patel, Kishor Desai
  • Publication number: 20060055089
    Abstract: A zoned web material having zones of radiation crosslinked elastomeric material with improved elevated temperature properties and lotion resistance. The elastomeric web comprises at least one first zone or region being characterized by a relatively high level of crosslinking and at least one second zone or region being characterized by a relatively low level of crosslinking. The zones of high crosslinking correspond to the zones of improved elastomeric properties, and can be made in virtually any predetermined pattern. In a preferred embodiment, the zoned web material is suitable for use in elasticized or body-hugging portions of disposable absorbent articles such as the side panels, waist bands, or cuffs of disposable diapers, or of health care products such as dressings, bandages and wraps. The zoned web material of the present invention may also be used in other portions of the absorbent articles where a stretchable portion of material is desired, such as stretchable topsheets or backsheets.
    Type: Application
    Filed: October 19, 2005
    Publication date: March 16, 2006
    Inventors: John Zhang, Matthew McNally, Thomas Daugherty