Patents by Inventor Thomas Domenick Marra

Thomas Domenick Marra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9397711
    Abstract: Exemplary embodiments are related to digital pre-distortion in envelope tracking systems. A device may include an amplitude modulation-to-phase modulation (AM-PM) distortion unit configured to generate an AM-PM distortion component in response to receipt of phase data of an input transmit signal. The device may also include a local oscillator (LO) path coupled to the distortion unit and configured to convey a local oscillator (LO) signal that varies based on the AM-PM distortion component.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: July 19, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Bhushan Shanti Asuri, Thomas Domenick Marra, Mohammad Farazian, Gurkanwal Singh Sahota
  • Publication number: 20150139358
    Abstract: Exemplary embodiments are related to digital pre-distortion in envelope tracking systems. A device may include an amplitude modulation-to-phase modulation (AM-PM) distortion unit configured to generate an AM-PM distortion component in response to receipt of phase data of an input transmit signal. The device may also include a local oscillator (LO) path coupled to the distortion unit and configured to convey a local oscillator (LO) signal that varies based on the AM-PM distortion component.
    Type: Application
    Filed: November 18, 2013
    Publication date: May 21, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Bhushan Shanti ASURI, Thomas Domenick MARRA, Mohammad FARAZIAN, Gurkanwal Singh SAHOTA
  • Patent number: 8970307
    Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: March 3, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Thomas Domenick Marra, Aristotele Hadjichristos, Nathan M Pletcher
  • Patent number: 8890617
    Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: November 18, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Thomas Domenick Marra, Aristotele Hadjichristos, Nathan M. Pletcher
  • Patent number: 8698558
    Abstract: Techniques for efficiently generating a power supply are described. In one design, an apparatus includes an envelope amplifier and a boost converter. The boost converter generates a boosted supply voltage having a higher voltage than a first supply voltage (e.g., a battery voltage). The envelope amplifier generates a second supply voltage based on an envelope signal and the boosted supply voltage (and also possibly the first supply voltage). A power amplifier operates based on the second supply voltage. In another design, an apparatus includes a switcher, an envelope amplifier, and a power amplifier. The switcher receives a first supply voltage and provides a first supply current. The envelope amplifier provides a second supply current based on an envelope signal. The power amplifier receives a total supply current including the first and second supply currents. In one design, the switcher detects the second supply current and adds an offset to generate a larger first supply current than without the offset.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: April 15, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Lennart K Mathe, Thomas Domenick Marra, Todd R Sutton
  • Publication number: 20120326783
    Abstract: Techniques for efficiently generating a power supply are described. In one design, an apparatus includes an envelope amplifier and a boost converter. The boost converter generates a boosted supply voltage having a higher voltage than a first supply voltage (e.g., a battery voltage). The envelope amplifier generates a second supply voltage based on an envelope signal and the boosted supply voltage (and also possibly the first supply voltage). A power amplifier operates based on the second supply voltage. In another design, an apparatus includes a switcher, an envelope amplifier, and a power amplifier. The switcher receives a first supply voltage and provides a first supply current. The envelope amplifier provides a second supply current based on an envelope signal. The power amplifier receives a total supply current including the first and second supply currents. In one design, the switcher detects the second supply current and adds an offset to generate a larger first supply current than without the offset.
    Type: Application
    Filed: June 23, 2011
    Publication date: December 27, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Lennart K. Mathe, Thomas Domenick Marra, Todd R. Sutton
  • Patent number: 8306096
    Abstract: A method for interference reduction is described. A sampling frequency is selected for a digital-to-analog converter (DAC) so that images within a DAC output signal do not interfere with one or more receivers. A sample rate is adjusted of an input signal that is provided to the DAC to match the sampling frequency for the DAC.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: November 6, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Hemanth Sampath, Christian Holenstein, Jeremy Huei Lin, Tamer Adei Kadous, Thomas Domenick Marra
  • Publication number: 20100328127
    Abstract: A method for interference reduction is described. A sampling frequency is selected for a digital-to-analog converter (DAC) so that images within a DAC output signal do not interfere with one or more receivers. A sample rate is adjusted of an input signal that is provided to the DAC to match the sampling frequency for the DAC.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 30, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Hemanth Sampath, Christian Holenstein, Jeremy Huei Lin, Tamer Adei Kadous, Thomas Domenick Marra