Abstract: There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and a drain region. The method includes steps of embedding stressors in the source and drain regions of the FET; forming a stress liner covering the gate and the source and drain regions; removing a portion of the stress liner, the portion of the stress liner being located on top of the gate of the FET; removing at least a substantial portion of the gate of a first gate material and thus creating an opening therein; and filling the opening with a second gate material.

Abstract: A semiconductor device is provided wherein at least one offset spacer is reduced and a non-conformal stress liner is thereafter deposited. By depositing the non-conformal stress liner in accordance with the present invention in close stress proximity to the FET, the carrier mobility and the performance of said device is significantly enhanced. The present invention is her directed to a method of fabricating said semiconductor device.

Abstract: Silicon on insulator devices having the body-tied-to-source are described. In an embodiment, a semiconductor device comprises: a gate conductor spaced above a semiconductor layer by a gate dielectric; dielectric spacers disposed laterally adjacent to sidewalls of the gate conductor; source and drain junctions laterally spaced apart by a body region in the semiconductor layer; and a conductive implant region comprising metallic species disposed in a bottom region of the semiconductor layer for electrically connecting the source junction to the body region, wherein a drain-side of the implant region is spaced apart from the body region and a source-side of the implant region contacts the body region.

Abstract: There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and a drain region. The method includes steps of embedding stressors in the source and drain regions of the FET; forming a stress liner covering the gate and the source and drain regions; removing a portion of the stress liner, the portion of the stress liner being located on top of the gate of the FET; removing at least a substantial portion of the gate of a first gate material and thus creating an opening therein; and filling the opening with a second gate material.

Abstract: Methods of fabricating silicon on insulator devices having the body-tied-to-source are described. In an embodiment, a method of forming a transistor device comprises: providing a semiconductor topography comprising a gate conductor spaced above a semiconductor layer by a gate dielectric, dielectric sidewall spacers adjacent to sidewalls of the gate conductor, and source and drain junctions laterally spaced apart by a body region in the semiconductor layer; and implanting metallic species in a bottom region of the semiconductor layer to form a conductive implant region to electrically connect the source junction to the body region.

Abstract: A semiconductor device is provided wherein at least one offset spacer is reduced and a non-conformal stress liner is thereafter deposited. By depositing the non-conformal stress liner in accordance with the present invention in close stress proximity to the FET, the carrier mobility and the performance of said device is significantly enhanced. The present invention is her directed to a method of fabricating said semiconductor device.

Abstract: Embodiments of the present invention provide a method of forming a conductive stud contacting a semiconductor device. The method includes forming a protective layer covering the semiconductor device; selectively etching an opening down through the protective layer reaching a contact area of the semiconductor device, the opening being away from a protected area of the semiconductor device; and filling the opening with a conductive material to form the conductive stud. One embodiment may further include forming a dielectric liner directly on top of the semiconductor device, and forming the protective layer on top of the dielectric liner. Embodiments of the present invention also provide a semiconductor device made thereof.

Abstract: The present invention relates to a method of fabricating a semiconductor substrate that includes forming at least first and second device regions, wherein the first device region includes a first recess having interior surfaces oriented along a first set of equivalent crystal planes, and wherein the second device region includes a second recess having interior surfaces oriented along a second, different set of equivalent crystal planes. The semiconductor device structure formed using such a semiconductor substrate includes at least one n-channel field effect transistor (n-FET) formed at the first device region having a channel that extends along the interior surfaces of the first recess, and at least one p-channel field effect transistor (p-FET) formed at the second device region having a channel that extends along the interior surfaces of the second recess.

Abstract: Sheet-like products, such as tissue products, are disclosed containing an additive composition. The additive composition, for instance, comprises an aqueous dispersion containing an alpha-olefin polymer, an ethylene-carboxylic acid copolymer, or mixtures thereof. The alpha-olefin polymer may comprise an interpolymer of ethylene and octene, while the ethylene-carboxylic acid copolymer may comprise ethylene-acrylic acid copolymer. The additive composition may also contain a dispersing agent, such as a fatty acid. The additive composition may be incorporated into the tissue web by being combined with the fibers that are used to form the web. Alternatively, the additive composition may be topically applied to the web after the web has been formed. The additive composition can improve various properties of the sheet-like product. For instance, in one embodiment, the additive composition can reduce lint and increase softness.

Abstract: Sheet-like products are disclosed containing an additive composition. In accordance with the present disclosure, the additive composition is applied to a creping surface. A base sheet is then pressed against the creping surface for contact with the additive composition. The base sheet is then creped from the creping surface causing the additive composition to transfer to the base sheet. In particular, the additive composition is transferred to the base sheet in amounts greater than about 1% by weight, such as from about 2% to about 50% by weight. The additive composition can comprise, for instance, a thermoplastic polymer resin containing an aqueous dispersion, a lotion, a debonder, a softener, or mixtures thereof.

Abstract: Sheet-like products are disclosed containing an additive composition. In accordance with the present disclosure, the additive composition is applied to a creping surface. A base sheet is then pressed against the creping surface for contact with the additive composition. The base sheet is then creped from the creping surface causing the additive composition to transfer to the base sheet. In particular, the additive composition is transferred to the base sheet in amounts greater than about 1% by weight, such as from about 2% to about 50% by weight. The additive composition can comprise, for instance, a thermoplastic polymer resin containing an aqueous dispersion, a lotion, a debonder, a softener, or mixtures thereof.

Abstract: Wiping products are disclosed containing an additive composition that enhances the cleaning properties of the product. The additive composition, for instance, comprises an aqueous dispersion containing an alpha-olefin polymer, an ethylene-carboxylic acid copolymer, or mixtures thereof. The alpha-olefin polymer may comprise an interpolymer of ethylene and octene, while the ethylene-carboxylic acid copolymer may comprise ethylene-acrylic acid copolymer. The additive composition may also contain a dispersing agent, such as a fatty acid.

Abstract: Tissue products are disclosed containing an additive composition. The additive composition, for instance, comprises an aqueous dispersion containing an alpha-olefin polymer, an ethylene-carboxylic acid copolymer, or mixtures thereof. The alpha-olefin polymer may comprise an interpolymer of ethylene and octene, while the ethylene-carboxylic acid copolymer may comprise ethylene-acrylic acid copolymer. The additive composition may also contain a dispersing agent, such as a fatty acid. The additive composition may be incorporated into the tissue web by being combined with the fibers that are used to form the web. Alternatively, the additive composition may be topically applied to the web after the web has been formed. For instance, in one embodiment, the additive composition may be applied to the web as a creping adhesive during a creping operation. The additive composition may improve the strength of the tissue web and/or improve the perceived softness of the web.

Abstract: The present invention relates to high performance three-dimensional (3D) field effect transistors (FETs). Specifically, a 3D semiconductor structure having a bottom surface oriented along one of a first set of equivalent crystal planes and multiple additional surfaces oriented along a second, different set of equivalent crystal planes can be used to form a high performance 3D FET with carrier channels oriented along the second, different set of equivalent crystal planes. More importantly, such a 3D semiconductor structure can be readily formed over the same substrate with an additional 3D semiconductor structure having a bottom surface and multiple additional surfaces all oriented along the first set of equivalent crystal planes. The additional 3D semiconductor structure can be used to form an additional 3D FET, which is complementary to the above-described 3D FET and has carrier channels oriented along the first set of equivalent crystal planes.

Abstract: Wiping products are disclosed comprising a sheet and an additive composition. The additive composition, for instance, comprises an aqueous dispersion containing an alpha-olefin polymer, an ethylene-carboxylic acid copolymer, or mixtures thereof. The alpha-olefin polymer may comprise an interpolymer of ethylene and octene, while the ethylene-carboxylic acid copolymer may comprise ethylene-acrylic acid copolymer. The additive composition may also contain a dispersing agent, such as a fatty acid. The additive composition may be incorporated into the sheet by being combined with the fibers that are used to form the sheet. Alternatively, the additive composition may be topically applied to the sheet after the sheet has been formed. For instance, in one embodiment, the additive composition may be applied to the sheet as a creping adhesive during a creping operation. The additive composition may improve the strength of the sheet and/or improve the perceived softness of the sheet.

Abstract: Wiping products are disclosed containing an additive composition that enhances the cleaning properties of the product. The additive composition, for instance, comprises an aqueous dispersion containing an alpha-olefin polymer, an ethylene-carboxylic acid copolymer, or mixtures thereof. The alpha-olefin polymer may comprise an interpolymer of ethylene and octene, while the ethylene-carboxylic acid copolymer may comprise ethylene-acrylic acid copolymer. The additive composition may also contain a dispersing agent, such as a fatty acid.

Abstract: Sheet-like products are disclosed containing an additive composition. In accordance with the present disclosure, the additive composition is applied to a creping surface. The additive composition includes at least an aqueous dispersion containing a thermoplastic polymer. A base sheet is then pressed against the creping surface for contact with the additive composition. The base sheet is then creped from the creping surface causing the additive composition to transfer to the base sheet. In particular, the additive composition is transferred to the base sheet in amounts greater than about 1% by weight, such as from about 2% to about 50% by weight. The additive composition may further include a lotion, a debonder, a softener, or mixtures thereof.

Abstract: Methods for source/drain implantation and strain transfer to a channel of a semiconductor device and a related semiconductor device are disclosed. In one embodiment, the method includes using a first size spacer for deep source/drain implantation adjacent a gate region of a semiconductor device; and using a second, smaller size spacer for silicide formation adjacent the gate region and transferring strain from a stress liner to a channel underlying the gate region. One embodiment of a semiconductor device may include a gate region atop a substrate; a spacer including a spacer core and an outer spacer member about the spacer core; a deep source/drain region within the substrate and distanced from the spacer; and a silicide region within the substrate and overlapping and extending beyond the deep source/drain region, the silicide region aligned to the spacer.

Abstract: The present invention relates to high performance three-dimensional (3D) field effect transistors (FETs). Specifically, a 3D semiconductor structure having a bottom surface oriented along one of a first set of equivalent crystal planes and multiple additional surfaces oriented along a second, different set of equivalent crystal planes can be used to form a high performance 3D FET with carrier channels oriented along the second, different set of equivalent crystal planes. More importantly, such a 3D semiconductor structure can be readily formed over the same substrate with an additional 3D semiconductor structure having a bottom surface and multiple additional surfaces all oriented along the first set of equivalent crystal planes. The additional 3D semiconductor structure can be used to form an additional 3D FET, which is complementary to the above-described 3D FET and has carrier channels oriented along the first set of equivalent crystal planes.

Abstract: An improved semiconductor-on-insulator (SOI) substrate is provided, which has a substantially planar upper surface and comprises at least first and second patterned buried insulator layers. Specifically, the first patterned buried insulator layer has a first thickness and is located in the SOI substrate at a first depth from the substantially planar upper surface, and the second patterned buried insulator layer has a second, different thickness and is located in the SOI substrate at a second, different depth from the substantially planar upper surface. The first and second patterned buried insulator layers are separated from each other by one or more interlayer gaps, which provide body contacts for the SOI substrate. The SOI substrate of the present invention can be readily formed by a method that includes at least two independent ion implantation steps.