Patents by Inventor Thomas E. Doane

Thomas E. Doane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9499920
    Abstract: A method of producing rectangular seeds for use in semiconductor or solar material manufacturing includes connecting an adhesive layer to a top surface of a template, the template including a plurality of parallel slots, and drawing alignment lines on the adhesive layer, the alignment lines aligned with at least some of the parallel slots. The method also includes connecting quarter sections to the adhesive layer such that an interface between a rectangular seed portion and a curved wing portion of each quarter section is aligned with at least one of the alignment lines drawn on the adhesive layer, and slicing each of the quarter sections to separate the rectangular seed portions from the curved wing portions.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: November 22, 2016
    Assignee: MEMC Singapore Pte. Ltd. (UEN200614794D)
    Inventors: Jihong John Chen, Susan S. Dwyer, Shawn Wesley Hayes, Thomas E. Doane, Dale A. Witte, Linda K. Swiney, Travis L. Hambach
  • Publication number: 20150308011
    Abstract: A method of producing rectangular seeds for use in semiconductor or solar material manufacturing includes connecting an adhesive layer to a top surface of a template, the template including a plurality of parallel slots, and drawing alignment lines on the adhesive layer, the alignment lines aligned with at least some of the parallel slots. The method also includes connecting quarter sections to the adhesive layer such that an interface between a rectangular seed portion and a curved wing portion of each quarter section is aligned with at least one of the alignment lines drawn on the adhesive layer, and slicing each of the quarter sections to separate the rectangular seed portions from the curved wing portions.
    Type: Application
    Filed: July 9, 2015
    Publication date: October 29, 2015
    Inventors: Jihong John Chen, Susan S. Dwyer, Shawn Wesley Hayes, Thomas E. Doane, Dale A. Witte, Linda K. Swiney, Travis L. Hambach
  • Patent number: 9136185
    Abstract: Methods and systems for evaluation of wafers are disclosed. One example method includes illuminating a multi-crystalline wafer according to a plurality of lighting parameters, capturing a plurality of images of the multi-crystalline wafer, stacking and projecting the plurality of images to generate a composite image, analyzing the composite image to identify one or more grains of the multi-crystalline wafer, and generating a report based on the analysis of the composite image. The multi-crystalline wafer is illuminated according to a different one of the plurality of lighting parameters in at least two of the plurality of images.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: September 15, 2015
    Assignee: MEMC Singapore Pte., Ltd.
    Inventors: Gang Shi, Thomas E. Doane, Steven L. Kimbel, Robert H. Fuerhoff
  • Patent number: 9111745
    Abstract: A method of producing rectangular seeds for use in semiconductor or solar material manufacturing includes connecting an adhesive layer to a top surface of a template, the template including a plurality of parallel slots, and drawing alignment lines on the adhesive layer, the alignment lines aligned with at least some of the parallel slots. The method also includes connecting quarter sections to the alignment layer such that an interface between a rectangular seed portion and a curved wing portion of each quarter section is aligned with at least one of the alignment lines drawn on the adhesive layer, and slicing each of the quarter sections to separate the rectangular seed portions from the curved wing portions.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: August 18, 2015
    Assignee: MEMC Singapore Pte., Ltd. (UEN200614794D)
    Inventors: Jihong John Chen, Susan S. Dwyer, Shawn Wesley Hayes, Thomas E. Doane, Dale A. Witte, Linda K. Swiney, Travis L. Hambach
  • Publication number: 20130156293
    Abstract: Methods and systems for evaluation of wafers are disclosed. One example method includes illuminating a multi-crystalline wafer according to a plurality of lighting parameters, capturing a plurality of images of the multi-crystalline wafer, stacking and projecting the plurality of images to generate a composite image, analyzing the composite image to identify one or more grains of the multi-crystalline wafer, and generating a report based on the analysis of the composite image. The multi-crystalline wafer is illuminated according to a different one of the plurality of lighting parameters in at least two of the plurality of images.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 20, 2013
    Applicant: MEMC Singapore, Pte. Ltd.(UEN200614794D)
    Inventors: Gang Shi, Thomas E. Doane, Steven L. Kimbel, Robert H. Fuerhoff
  • Patent number: 8309464
    Abstract: The present disclosure generally relates to the manufacture of silicon wafers, and more particularly to edge etching apparatus and methods for etching the edge of a silicon wafer.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: November 13, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Henry F. Erk, Peter D. Albrecht, Eugene R. Hollander, Thomas E. Doane, Judith A. Schmidt, Roland R. Vandamme, Guoqiang (David) Zhang
  • Patent number: 8192822
    Abstract: The present disclosure generally relates to the manufacture of silicon wafers, and more particularly to edge etching apparatus and methods for etching the edge of a silicon wafer.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: June 5, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Henry F. Erk, Peter D. Albrecht, Eugene R. Hollander, Thomas E. Doane, Judith A. Schmidt, Roland R. Vandamme, Guoqiang (David) Zhang
  • Publication number: 20090247055
    Abstract: The present disclosure generally relates to the manufacture of silicon wafers, and more particularly to edge etching apparatus and methods for etching the edge of a silicon wafer.
    Type: Application
    Filed: March 31, 2009
    Publication date: October 1, 2009
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Henry F. Erk, Peter D. Albrecht, Eugene R. Hollander, Thomas E. Doane, Judith A. Schmidt, Roland R. Vandamme, Guoqiang (David) Zhang
  • Publication number: 20090242126
    Abstract: The present disclosure generally relates to the manufacture of silicon wafers, and more particularly to edge etching apparatus and methods for etching the edge of a silicon wafer.
    Type: Application
    Filed: March 31, 2009
    Publication date: October 1, 2009
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Henry F. Erk, Peter D. Albrecht, Eugene R. Hollander, Thomas E. Doane, Judith A. Schmidt, Roland Vandamme, Guoqiang (David) Zhang
  • Publication number: 20090246444
    Abstract: The present disclosure generally relates to the manufacture of silicon wafers, and more particularly to edge etching apparatus and methods for etching the edge of a silicon wafer.
    Type: Application
    Filed: March 31, 2009
    Publication date: October 1, 2009
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Henry F. Erk, Peter D. Albrecht, Eugene R. Hollander, Thomas E. Doane, Judith A. Schmidt, Roland R. Vandamme, Guoqiang (David) Zhang
  • Patent number: 7323421
    Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: January 29, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Mark G. Stinson, Henry F. Erk, Guoqiang (David) Zhang, Mick Bjelopavlic, Alexis Grabbe, Jozef G. Vermeire, Judith A. Schmidt, Thomas E. Doane, James R. Capstick
  • Publication number: 20040108297
    Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water and a source of hydroxide ions and generally characterized by a lower concentration of water and/or higher concentration of source of hydroxide ions. In accordance with another embodiment, the caustic etchant includes a salt additive. The process produces silicon wafers with improved surface characteristics such as flatness and nanotopography.
    Type: Application
    Filed: September 18, 2003
    Publication date: June 10, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Henry F. Erk, James R. Capstick, Thomas E. Doane, Alexis Grabbe, Judith A. Schmidt, Annlie Sing, Mark G. Stinson, Guoqiang (David) Zhang
  • Publication number: 20020142619
    Abstract: A process for etching a silicon wafer is disclosed. The process comprises oxidizing silicon with permanganate ions and stripping the silicon oxide with hydrofluoric acid, in the presence of a non-oxidizable acid and typically a surfactant. The present process affords a means to more consistently obtain a silicon wafer having improved gloss or smoothness, while minimizing both the amount of silicon removed from the wafer surface and the cost of the etching process.
    Type: Application
    Filed: January 4, 2002
    Publication date: October 3, 2002
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Alexis Grabbe, Thomas E. Doane