Abstract: A semiconductor device with a deep trench has a dielectric liner formed on sidewalls and a bottom of the deep trench. A pre-etch deposition step of a two-step process forms a protective polymer on an existing top surface of the semiconductor device, and on the dielectric liner proximate to a top surface of the substrate. The pre-etch deposition step does not remove a significant amount of the dielectric liner from the bottom of the deep trench. A main etch step of the two-step process removes the dielectric liner at the bottom of the deep trench while maintaining the protective polymer at the top of the deep trench. The protective polymer is subsequently removed.

Abstract: A semiconductor device with a deep trench has a dielectric liner formed on sidewalls and a bottom of the deep trench. A pre-etch deposition step of a two-step process forms a protective polymer on an existing top surface of the semiconductor device, and on the dielectric liner proximate to a top surface of the substrate. The pre-etch deposition step does not remove a significant amount of the dielectric liner from the bottom of the deep trench. A main etch step of the two-step process removes the dielectric liner at the bottom of the deep trench while maintaining the protective polymer at the top of the deep trench. The protective polymer is subsequently removed.

Abstract: A semiconductor device with a deep trench has a dielectric liner formed on sidewalls and a bottom of the deep trench. A pre-etch deposition step of a two-step process forms a protective polymer on an existing top surface of the semiconductor device, and on the dielectric liner proximate to a top surface of the substrate. The pre-etch deposition step does not remove a significant amount of the dielectric liner from the bottom of the deep trench. A main etch step of the two-step process removes the dielectric liner at the bottom of the deep trench while maintaining the protective polymer at the top of the deep trench. The protective polymer is subsequently removed.

Abstract: A method of fabricating metal-bearing structures in an integrated circuit such as metal-polysilicon capacitors using conductive metal compounds. Defects due to organometallic polymers formed during the etch of a hard mask material are minimized by using a process that includes a plasma etch for the hard mask that achieves a predominantly chemical character using a fluorine-based etch chemistry. Using a low-temperature liquid-phase strip of the hard mask photoresist instead of an ash prevents further cross-linking of polymers formed during the plasma etch. Etching the metal-bearing material using a hot fully-concentrated mixture of ammonium hydroxide and hydrogen peroxide allows short etch times that are particularly shortened for tantalum nitride films deposited with a nitrogen concentration of about 30 percent or greater.

Abstract: A method of fabricating metal-bearing structures in an integrated circuit such as metal-polysilicon capacitors using conductive metal compounds. Defects due to organometallic polymers formed during the etch of a hard mask material are minimized by using a process that includes a plasma etch for the hard mask that achieves a predominantly chemical character using a fluorine-based etch chemistry. Using a low-temperature liquid-phase strip of the hard mask photoresist instead of an ash prevents further cross-linking of polymers formed during the plasma etch. Etching the metal-bearing material using a hot fully-concentrated mixture of ammonium hydroxide and hydrogen peroxide allows short etch times that are particularly shortened for tantalum nitride films deposited with a nitrogen concentration of about 30 percent or greater.