Abstract: Miniature slow-wave transmission lines are described having an asymmetrical ground configuration. In some embodiments, the asymmetrical ground configuration facilitates a reduction in size. Non-uniform auxiliary conductors may be disposed above or below the co-planar waveguide to facilitate a reduction in the length of the miniature slow-wave transmission lines. Phase shifters may be implemented having a reduced size by including one or more miniature slow-wave transmission lines.

Abstract: An electrical circuit can be formed at least in part using lumped or discrete circuit elements to provide an artificial transmission line structure that can mimic the electrical properties of a corresponding actual transmission line structure. Such an artificial transmission line structure can generally consume less area than an actual transmission line structure lacking such lumped or discrete elements. Such an artificial transmission line structure can be formed using two or more “unit cells” such as by cascading such cells as shown and described herein. The present inventors have recognized, among other things, that a unit cell of an artificial transmission line structure can include a t-coil section comprising magnetically-coupled inductors. Such an artificial transmission line structure can be used for applications such as phase shifting or to provide a delay line having a substantially constant group delay, among other applications.

Abstract: An electrical circuit can be formed at least in part using lumped or discrete circuit elements to provide an artificial transmission line structure that can mimic the electrical properties of a corresponding actual transmission line structure. Such an artificial transmission line structure can generally consume less area than an actual transmission line structure lac0ure can be formed using two or more “unit cells” such as by cascading such cells as shown and described herein. The present inventors have recognized, among other things, that a unit cell of an artificial transmission line structure can include a t-coil section comprising magnetically-coupled inductors. Such an artificial transmission line structure can be used for applications such as phase shifting or to provide a delay line having a substantially constant group delay, among other applications.

Abstract: An electronic circuit can include a gain adjustment circuit (e.g., a gain “equalizer” circuit), such as to compensate for a variation in insertion loss over a specified range of frequencies. For example, such a gain adjustment circuit can provide an insertion loss characteristic having a specified slope. Such a slope can include a positive slope where insertion loss increases with respect to frequency, or a negative slope where insertion loss decreases with respect to frequency, as illustrative examples. A gain equalization technique can be used to compensate for variation in insertion loss versus frequency between different circuit paths, such as in relation to a switchable delay line having two or more selectable paths, such as for phase shifting applications. A gain adjustment circuit can be configured to provide relatively flat or constant time-domain delay versus frequency, such as inhibiting or reducing dispersion.

Abstract: Miniature slow-wave transmission lines are described having an asymmetrical ground configuration. In some embodiments, the asymmetrical ground configuration facilitates a reduction in size. Non-uniform auxiliary conductors may be disposed above or below the co-planar waveguide to facilitate a reduction in the length of the miniature slow-wave transmission lines. Phase shifters may be implemented having a reduced size by including one or more miniature slow-wave transmission lines.

Abstract: A double-balanced FET mixer may include: single-ended RF port that receives or delivers single-ended RF signal; RF balun that converts the received single-ended RF signal into differential RF signal or generates delivered single-ended RF signal from received differential RF signal; local oscillator input port receives local oscillator signal; direct IF port receives or delivers an IF signal; and at least two FETs process the local oscillator signal and generate or process the differential RF signal and IF signal. The mixer may have no IF balun separate and distinct from tRF balun; may receive an input signal at RF port and generates output signal at IF port. The mixer may receive input signal at IF port and generate an output signal at the RF port, the output signal in either case being plus or minus the local oscillator signal. The double-balanced FET mixer may operate with IF frequencies down to DC.

Abstract: A double-balanced FET mixer may include: single-ended RF port that receives or delivers single-ended RF signal; RF balun that converts the received single-ended RF signal into differential RF signal or generates delivered single-ended RF signal from received differential RF signal; local oscillator input port receives local oscillator signal; direct IF port receives or delivers an IF signal; and at least two FETs process the local oscillator signal and generate or process the differential RF signal and IF signal. The mixer may have no IF balun separate and distinct from tRF balun; may receive an input signal at RF port and generates output signal at IF port. The mixer may receive input signal at IF port and generate an output signal at the RF port, the output signal in either case being plus or minus the local oscillator signal. The double-balanced FET mixer may operate with IF frequencies down to DC.

Abstract: A broadband radio frequency, microwave, or millimeter mixer system may include a balun and a mixer. The balun may have an unbalanced port; a balanced port; a first and a second inductor tightly and inversely magnetically coupled to one another; and a third inductor which is not magnetically coupled to the first or the second inductors. The mixer may be connected to the balanced port of the balun. The balun, including its three inductors, and the mixer may all be integrated onto a single substrate that forms an integrated circuit.

Abstract: A broadband radio frequency, microwave, or millimeter mixer system may include a balun and a mixer. The balun may have an unbalanced port; a balanced port; a first and a second inductor tightly and inversely magnetically coupled to one another; and a third inductor which is not magnetically coupled to the first or the second inductors. The mixer may be connected to the balanced port of the balun. The balun, including its three inductors, and the mixer may all be integrated onto a single substrate that forms an integrated circuit.

Abstract: Frequency conversion circuitry has an input node for receiving an input signal at a first frequency and an output node for producing an output signal at a second frequency different from the first frequency. A mixer circuit is responsive to the input signal for producing a signal at the second frequency. A step down impedance transformation circuit is coupled between the input node and an input of the mixer circuit for providing input impedance of the mixer circuit lower than impedance at the input node. An amplifier circuit is coupled between an output of the mixer circuit and the output node for amplifying the signal at the second frequency produced at the output of the mixer circuit. The mixer circuit is configured for providing input impedance of the output amplifier lower than the impedance at the input node.

Abstract: A double balanced mixer circuit 10 receives an input signal (RFIN) at first input terminals (14), supplying that signal to the primary side of a transformer (12). The secondary side of the transformer (12) is coupled to the bases of transistors (18 and 26) that supply the tail currents to a pair of differential transistors. The center tap of transformer (12) receives a voltage (VBIAS) that keeps the transistors (18 and 26) biased in their linear regions. A capacitor (16) provides an AC ground at the center tap point of the transformer (12). The first differential transistor pair (20 and 22) and the second differential transistor pair (28 and 30) receive a differential signal (LO) at second input terminals 15. A differential signal IFOUT down-converted in frequency from the RF frequency range to the IF frequency range is supplied at output terminals (34).

Abstract: A low noise amplifier (10) having an amplifier mode and a bypass mode. In the amplifier mode the input signal received at an input terminal (12) is amplified by an amplifying transistor (40) and the output signal supplied at an output terminal (50). In the bypass mode the input signal is not amplified, but transferred by a bypass circuit (22) from the base to the collector of the amplifying transistor. An input impedance matching circuit (14) and an output impedance matching circuit (44), along with the bypass circuit (22) provide a constant input and output impedance when the low noise amplifier (10) operates in the amplifier mode and the bypass mode.

Abstract: A low noise amplifier (10) having an amplifier mode and a bypass mode. In the amplifier mode the input signal received at an input terminal (12) is amplified by an amplifying transistor (40) and the output signal supplied at an output terminal (50). In the bypass mode the input signal is not amplified, but transferred by a bypass circuit (22) from the base to the collector of the amplifying transistor. An input impedance matching circuit (14) and an output impedance matching circuit (44), along with the bypass circuit (22) provide a constant input and output impedance when the low noise amplifier (10) operates in the amplifier mode and the bypass mode.

Abstract: A double balanced mixer circuit 10 receives an input signal (RFIN) at first input terminals (14), supplying that signal to the primary side of a transformer (12). The secondary side of the transformer (12) is coupled to the bases of transistors (18 and 26) that supply the tail currents to a pair of differential transistors. The center tap of transformer (12) receives a voltage (VBIAS) that keeps the transistors (18 and 26) biased in their linear regions. A capacitor (16) provides an AC ground at the center tap point of the transformer (12). The first differential transistor pair (20 and 22) and the second differential transistor pair (28 and 30) receive a differential signal (LO) at second input terminals 15. A differential signal IFOUT down-converted in frequency from the RF frequency range to the IF frequency range is supplied at output terminals (34).

Abstract: A sample and hold circuit is formed within an integrated circuit and has a small, substantially linear hold capacitance. The circuit includes a sampling switch, a hold capacitor, and a buffer amplifier. The buffer amplifier includes a common drain FET and a constant current source FET. The common drain FET provides an input which couples to the hold capacitor. The constant current FET isolates the source of the common drain FET from ground. The sample and hold circuit may be used as a wide bandwidth mixer. In a radio application, a pulse generator provides a stream of pulses in which the sampling rate times an integer number equals the RF frequency minus the IF frequency. The width of the sampling pulse is less than the period of an RF signal. In an oscillator application, the sample and hold circuit operates as a mixer in a frequency multiplying phase locked loop.