Patents by Inventor Thomas Edward Shull

Thomas Edward Shull has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11740908
    Abstract: In a particular implementation, a method includes: receiving, at a computing device, first and second instructions of a plurality of instructions obtained from a memory, where the first instruction corresponds to a preceding instruction of a second instruction, and where the second instruction corresponds to a succeeding instruction of the first instruction; determining a dependency of the first and second instructions; sending the first and second instructions to an issue queue of the computing device; executing, at the computing device, the first and second instructions; and completing, at the computing device, the first and second instructions.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: August 29, 2023
    Assignee: Arm Limited
    Inventors: Wei Wang, Thomas Edward Shull
  • Patent number: 11740907
    Abstract: In a particular implementation, a method includes: receiving, at a central processing unit (CPU), first and second instructions of a plurality of instructions obtained from a memory, where the first instruction corresponds to a preceding instruction of a second instruction, and where the second instruction corresponds to a succeeding instruction of the first instruction; determining a dependency of the first and second instructions; sending the first and second instructions to an issue queue of the CPU; executing, at the CPU, the first and second instructions; and completing, at the CPU, the first and second instructions.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: August 29, 2023
    Assignee: Arm Limited
    Inventor: Thomas Edward Shull
  • Publication number: 20210286625
    Abstract: In a particular implementation, a method includes: receiving, at a computing device, first and second instructions of a plurality of instructions obtained from a memory, where the first instruction corresponds to a preceding instruction of a second instruction, and where the second instruction corresponds to a succeeding instruction of the first instruction; determining a dependency of the first and second instructions; sending the first and second instructions to an issue queue of the computing device; executing, at the computing device, the first and second instructions; and completing, at the computing device, the first and second instructions.
    Type: Application
    Filed: December 21, 2020
    Publication date: September 16, 2021
    Inventors: Wei Wang, Thomas Edward Shull
  • Publication number: 20210286624
    Abstract: In a particular implementation, a method includes: receiving, at a central processing unit (CPU), first and second instructions of a plurality of instructions obtained from a memory, where the first instruction corresponds to a preceding instruction of a second instruction, and where the second instruction corresponds to a succeeding instruction of the first instruction; determining a dependency of the first and second instructions; sending the first and second instructions to an issue queue of the CPU; executing, at the CPU, the first and second instructions; and completing, at the CPU, the first and second instructions.
    Type: Application
    Filed: March 16, 2020
    Publication date: September 16, 2021
    Inventor: Thomas Edward Shull