Abstract: A door assembly may include a first sidelite configured to be operably coupled to a first doorjamb, a second sidelite configured to be operably coupled to a second door jamb where the first and second sidelites are disposed in a common plane and define a door opening between the first and second sidelites, a first sliding panel, a second sliding panel where the first and second sliding panels are movable from a closed position disposing the first and second sliding panels to block access through the door opening and an open position in which the first sliding panel is proximate the first sidelite and the second sliding panel is proximate the second sidelite, a first partial door panel, and a second partial door panel. The first and second sliding panels are disposed in a second plane parallel to the common plane in both the open and closed position. The first and second partial door panels are operably coupled to the first and second sidelites, respectively, via hinge assemblies.

Abstract: A door assembly may include a first sidelite configured to be operably coupled to a first door jamb, a second sidelite configured to be operably coupled to a second door jamb where the first and second sidelites are disposed in a common plane and define a door opening between the first and second sidelites, a first sliding panel, a second sliding panel where the first and second sliding panels are movable from a closed position disposing the first and second sliding panels to block access through the door opening and an open position in which the first sliding panel is proximate the first sidelite and the second sliding panel is proximate the second sidelite, a first partial door panel, and a second partial door panel. The first and second sliding panels are disposed in a second plane parallel to the common plane in both the open and closed position. The first and second partial door panels are operably coupled to the first and second sidelites, respectively, via hinge assemblies.

Abstract: A door assembly may include a first sidelite configured to be operably coupled to a first door jamb, a second sidelite configured to be operably coupled to a second door jamb where the first and second sidelites are disposed in a common plane and define a door opening between the first and second sidelites, a first sliding panel, a second sliding panel where the first and second sliding panels are movable from a closed position disposing the first and second sliding panels to block access through the door opening and an open position in which the first sliding panel is proximate the first sidelite and the second sliding panel is proximate the second sidelite, a first partial door panel, and a second partial door panel. The first and second sliding panels are disposed in a second plane parallel to the common plane in both the open and closed position. The first and second partial door panels are operably coupled to the first and second sidelites, respectively, via hinge assemblies.

Abstract: The invention relates to a semiconductor device, in particular a Schottky hybrid diode with a guard ring (S). The semiconductor device comprises a semiconductor substrate (1), an epitaxial layer (2) on which an insulating layer (3) with an opening (10) is deposited, with a Schottky metal layer (9) covering the epitaxial layer (2) lying at the bottom of the opening (10), and with an annular semiconductor region (4) which is present in the epitaxial layer (2). A doping region (6) is present in the epitaxial layer (2) along the outer contour of the semiconductor device, and in addition an oxide layer (8) is present on the epitaxial layer (2).

Abstract: The invention relates to a semiconductor device, in particular a Schottky hybrid diode with a guard ring (S). The semiconductor device comprises a semiconductor substrate (1), an epitaxial layer (2) on which an insulating layer (3) with an opening (10) is deposited, with a Schottky metal layer (9) covering the epitaxial layer (2) lying at the bottom of the opening (10), and with an annular semiconductor region (4) which is present in the epitaxial layer (2). A doping region (6) is present in the epitaxial layer (2) along the outer contour of the semiconductor device, and in addition an oxide layer (8) is present on the epitaxial layer (2).