Patents by Inventor Thomas F. Eckert

Thomas F. Eckert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for testing the non-cacheable region functioning of a cache memory controller
    Patent number: 5974510
    Abstract: A method for testing the functioning of a non-cacheable region within a cache having a cache controller programmed with a write-back write policy and a non-cacheable region included in an image memory region corresponding to a physical memory region. A first data pattern is written to the cache tagged at a first addressable location of a cacheable region in the physical memory region. A second data pattern is written to the cache tagged at a second addressable location in the image memory region contained within both the non-cacheable region and the cacheable region and corresponding to the first addressable location. The data stored in the cache and tagged at the first addressable location and corresponding to the non-cacheable region only of the second addressable location is read to determine whether the first data pattern remains in the cache thereby indicating that the non-cacheable region is functioning correctly.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: October 26, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Lei Cheng, Thomas F. Eckert, Michael T. Wisor