Patents by Inventor Thomas F. Toll

Thomas F. Toll has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • APPARATUS AND METHOD FOR EFFICIENT MIGRATION OF ARCHITECTURAL STATE BETWEEN PROCESSOR CORES
    Publication number: 20150095614
    Abstract: An apparatus and method are described for the efficient migration of architectural state between processor cores. For example, a processor according to one embodiment comprises: a first processing core having a first instruction execution pipeline including first register set for storing a first architectural state of a first thread being executed thereon; a second processing core having a second instruction execution pipeline including a second register set for storing a second architectural state of a second thread being executed thereon; and architectural state migration logic to perform a direct, simultaneous swap of the first architectural state from the first register set with the second architectural state from the second register set responsive to detecting that the execution of the first thread is to be migrated from the first core to the second core.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Inventors: Bret L. Toll, Scott D. Hahn, Jason W. Brandt, Thomas F. Toll
  • Replay instruction morphing
    Patent number: 8347066
    Abstract: Replay instruction morphing. One disclosed apparatus includes an execution unit to execute an instruction. A replay system replays an altered instruction if the execution unit executes the instruction erroneously.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: January 1, 2013
    Assignee: Intel Corporation
    Inventors: Douglas M. Carmean, David J. Sager, Thomas F. Toll, Karol F. Menezes
  • Replay instruction morphing
    Patent number: 6880069
    Abstract: Replay instruction morphing. One disclosed apparatus includes an execution unit to execute an instruction. A replay system replays an altered instruction if the execution unit executes the instruction erroneously.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: April 12, 2005
    Assignee: Intel Corporation
    Inventors: Douglas M. Carmean, David J. Sager, Thomas F. Toll, Karol F. Menezes