Patents by Inventor Thomas F Uhling

Thomas F Uhling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5600278
    Abstract: A first amplifier channel between an input and output includes an input transistor emitter and a first output transistor emitter connected together to form a first emitter pair. A current source is connected to the emitter pair via a transistor which is controlled by a latch. Programming the latch permits the channel to be turned on or off. The emitter pair is connected to a positive voltage through a resistor and to ground through a diode to force it to a controlled off voltage, which prevents signals from passing when the channel is off. There is a output driver amplifier in a feedback circuit. An outdisable circuit controls the voltage and current of the output driver amplifier to place the output in a state in which it appears electrically as an open circuit when the channel is off. Multiple programmable amplifiers can be combined to make a multiplexer, a selectable gain circuit, or a selectable attenuation circuit, all with high band width and high signal integrity.
    Type: Grant
    Filed: February 3, 1995
    Date of Patent: February 4, 1997
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, Keith C. Griggs
  • Patent number: 5586114
    Abstract: An oscilloscope preamplifier includes N inputs and Z outputs. A programmable cross-point multiplexer provides a first operating mode in which each of N inputs is connected to a different output thereby providing a preamplifier with Z channels, a second operating mode in which one input is multiplexed to all the outputs which are interleaved to maximize the sampling rate, and a range of operating modes in between. The programmable multiplexer includes a switching amplifier connected between each input and each output. Dials on the preamp select the mode by causing a microprocessor to program latches which activate or deactivate the switching amplifiers. A voltage divider is connected across inputs of the multiplexer to provide a programmable attenuator with selectable attenuation levels.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: December 17, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, Eddie A. Evel
  • Patent number: 5525910
    Abstract: An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1.4 .mu.sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1.4 .mu.sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.
    Type: Grant
    Filed: March 2, 1995
    Date of Patent: June 11, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, Philip J. Yearsley, Dale L. Pittock, Mark E. Mathews
  • Patent number: 5446260
    Abstract: An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1.4 .mu.sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1.4 .mu.sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.
    Type: Grant
    Filed: January 18, 1994
    Date of Patent: August 29, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, Philip J. Yearsley, Dale L. Pittock, Mark E. Mathews
  • Patent number: 5428204
    Abstract: An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1.4 .mu.sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1.4 .mu.sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.
    Type: Grant
    Filed: January 18, 1994
    Date of Patent: June 27, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, Philip J. Yearsley, Dale L. Pittock, Mark E. Mathews
  • Patent number: 5420515
    Abstract: An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1.4 .mu.sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1.4 .mu.sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.
    Type: Grant
    Filed: August 28, 1992
    Date of Patent: May 30, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, Philip J. Yearsley, Dale L. Pittock, Mark E. Mathews
  • Patent number: 5392001
    Abstract: A capacitively-coupled amplifier circuit includes an amplifier for receiving an input signal via a coupling capacitance and for amplifying the input signal to produce an output signal. A resistor provides a bias voltage to the amplifier. The resistor is bootstrapped using positive feedback with a loop gain of slightly less than one. The bootstrapping causes an increase in the value of the resistor to lower the cut-in (pole) frequency of the amplifier. The bootstrapping or feedback circuit includes a roll-off (pole) at a frequency below the roll-off (pole) frequency of the amplifier. This prevents phase shift in the feedback loop from adversely effecting the high frequency response of the amplifier. The resulting amplifier circuit exhibits a wide passband and excellent low frequency response despite having a capacitively coupled input signal.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: February 21, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, John M. Heumann, Ronald J. Peiffer
  • Patent number: 5384532
    Abstract: An AC impedance buffer comprising a series of three bipolar transistors in emitter follower configuration is AC coupled to a probe input. An output bipolar transistor has its emitter connected to the output emitter of the AC buffer and its collector provides the probe output. A DC impedance buffer comprises an op amp having inputs connected to the probe input and output and output connected to the base of the output transistor. Another op amp negatively biases the emitter followers so their collectors can be grounded and adds the DC and low frequencies to the AC buffer.
    Type: Grant
    Filed: July 1, 1992
    Date of Patent: January 24, 1995
    Assignee: Hewlett-Packard Company
    Inventor: Thomas F. Uhling