Patents by Inventor Thomas Freitag
Thomas Freitag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12335103Abstract: A method for autoconfiguration of a plurality of nodes in a linear network allows extracting the address and position of each node. The nodes are identified by a unique identifier. The method comprises choosing a node in a network and extracting its identifier, and for the first node to the last but one node, transmitting a current in the network from the chosen node, and reading the direction of the current flowing through at least the nodes not chosen in previous iteration cycles. The identifier is linked with the direction of the current for said not chosen nodes, obtaining the position of said not chosen nodes relative to the chosen node. These steps are repeated by choosing a different node not chosen before. Autoconfiguration is finished when the identifier of each node is extracted, and the physical position of each node is determined.Type: GrantFiled: July 20, 2023Date of Patent: June 17, 2025Assignee: MELEXIS TECHNOLOGIES NVInventors: Raik Frost, Thomas Freitag, Michael Frey, Heiko Leutert
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Publication number: 20250130116Abstract: A method and an apparatus for determining the temperature of a light-emitting device is described. The method includes operating the light-emitting device during an on-interval and during an off-interval, measuring, during at least one sensing interval, at least one electrical energy across the light-emitting device. The at least one sensing interval is included in the off-interval and each of the at least one sensing intervals has a duration equal to or less than a duration of the off-interval and determining, at least one temperature value of the light-emitting device based on the measured at least one electrical energy.Type: ApplicationFiled: October 3, 2024Publication date: April 24, 2025Inventors: Raik FROST, Thomas FREITAG
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Patent number: 12282054Abstract: A system for characterizing a transistor circuit which has a local minimum in its transfer characteristic by finding its local minimum. The system comprises: a bias voltage generator for generating a toggling signal; a multiplier configured for multiplying an electrical signal which is a function of the drain source current of the transistor circuit, with a waveform alternating between two predefined values synchronously with the toggling signal; a first integrator configured for integrating the electrical signal from the multiplier, and wherein if more integrators are present, linear combinations of output signals of the integrators are provided to the further integrators; a summator configured for summing the toggling signal and an integration signal and configured for outputting the sum to the gate of the transistor circuit.Type: GrantFiled: November 2, 2023Date of Patent: April 22, 2025Assignee: MELEXIS TECHNOLOGIES NVInventors: Francois Piette, Cliff De Locht, Axel Fanget, Andreas Ott, Andreas Laute, Thomas Freitag
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Publication number: 20240159820Abstract: A system for characterizing a transistor circuit which has a local minimum in its transfer characteristic by finding its local minimum. The system comprises: a bias voltage generator for generating a toggling signal; a multiplier configured for multiplying an electrical signal which is a function of the drain source current of the transistor circuit, with a waveform alternating between two predefined values synchronously with the toggling signal; a first integrator configured for integrating the electrical signal from the multiplier, and wherein if more integrators are present, linear combinations of output signals of the integrators are provided to the further integrators; a summator configured for summing the toggling signal and an integration signal and configured for outputting the sum to the gate of the transistor circuit.Type: ApplicationFiled: November 2, 2023Publication date: May 16, 2024Inventors: Francois PIETTE, Cliff DE LOCHT, Axel FANGET, Andreas OTT, Andreas LAUTE, Thomas FREITAG
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Publication number: 20240031239Abstract: A method for autoconfiguration of a plurality of nodes in a linear network allows extracting the address and position of each node. The nodes are identified by a unique identifier. The method comprises choosing a node in a network and extracting its identifier, and for the first node to the last but one node, transmitting a current in the network from the chosen node, and reading the direction of the current flowing through at least the nodes not chosen in previous iteration cycles. The identifier is linked with the direction of the current for said not chosen nodes, obtaining the position of said not chosen nodes relative to the chosen node. These steps are repeated by choosing a different node not chosen before. Autoconfiguration is finished when the identifier of each node is extracted, and the physical position of each node is determined.Type: ApplicationFiled: July 20, 2023Publication date: January 25, 2024Inventors: Raik FROST, Thomas FREITAG, Michael FREY, Heiko LEUTERT
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Publication number: 20240031200Abstract: A method for autoconfiguration of a plurality of nodes in a linear network allows extracting the address and position of each node. The method includes applying an identifier field for transmitting to the bus the bit sequence of the identifier of a chosen node. Then for at least for the first node to the last but one node, a field comprising a predetermined bit sequence is applied. The field comprises dominant bits, so a current is transmitted. Then, a further field is applied for transmitting any stored direction bit associated to that node and obtained in any previous iteration. The iteration continues by choosing a node different from a node chosen in any previous cycle, starting the communication, until all nodes are identified.Type: ApplicationFiled: July 20, 2023Publication date: January 25, 2024Inventors: Raik FROST, Thomas FREITAG, Michael FREY, Heiko LEUTERT
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Publication number: 20230386753Abstract: A trench capacitor includes a plurality of unit trench capacitors arranged in a 2D repetitive pattern in a substrate. The unit trench capacitors are separated by elongated trenches or elongated walls between the unit trench capacitors. The trench capacitor includes a plurality of stress compensation elements. Each unit trench capacitor has one or more closed trenches, with each trench further having a bottom electrode, a top electrode, and a dielectric between the bottom electrode and the top electrode. The unit trench capacitors are connected in parallel and the stress compensation elements are arranged between the unit trench capacitors such that they interrupt the elongated walls or trenches.Type: ApplicationFiled: May 1, 2023Publication date: November 30, 2023Inventors: Appo VAN DER WIEL, Thomas FREITAG
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Publication number: 20230254959Abstract: A safety related light system includes: one light source, a first control circuit, and a second control circuit. One of the first control circuit or the second control circuit is selectively enabled to operate in a drive mode to operate the one light source.Type: ApplicationFiled: February 7, 2023Publication date: August 10, 2023Inventors: Michael FREY, Jorgen STURM, Thomas FREITAG
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Patent number: 11552677Abstract: A transmitter device is provided for transmission of data via DC power distribution lines includes a sequence generator arranged for receiving a raw data bit stream to be transmitted over a positive and a negative DC power distribution line and for deriving a switching sequence based on the raw data bit stream, and a circuit including one or more capacitors and a plurality of switches controllable with the switching sequence derived in the sequence generator.Type: GrantFiled: October 7, 2021Date of Patent: January 10, 2023Assignee: MELEXIS TECHNOLOGIES NVInventors: Andreas Ott, Federico D'Aniello, Thomas Freitag, Andrea Baschirotto
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Publication number: 20220376949Abstract: A lighting system includes a plurality of nodes arranged in a serial network. The lighting system has a master node, one or more gateway nodes, a first communication bus connecting the one or more gateway nodes to the master node, a plurality of slave nodes such that each slave node is connected to a lighting source and is arranged for conveying data messages, and one or more second communication buses, each connecting one of the gateway nodes with one or more slave nodes of the plurality. The master node is arranged for conveying a unique network address to the one or more gateway nodes via the first communication bus, and the one or more gateway nodes are arranged for conveying a unique network address to the plurality of slave nodes via one of the second communication buses. At least one gateway node is arranged for storing a lighting plan for lighting one or more slave nodes connected to that gateway node.Type: ApplicationFiled: May 18, 2022Publication date: November 24, 2022Inventors: Raik FROST, Jens RÖPCKE, Thomas FREITAG, Michael BENDER
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Patent number: 11507525Abstract: A method for communicating between a master and a plurality of slaves includes generating a communication frame including generating a slave data frame in each slave. The slave data frame has a data packet including one or more data bytes and at least one gap of variable time length comprising no information in the slave data frame. The gap may be at the beginning of said slave data frame before the beginning of the first data byte of said data packet and/or at the end of said data packet after the end of a last data byte of said data packet, where the gaps have a time length dependency based on parameters locally stored in each of said at least one slave. The slave data frame is transmitted sequentially where the gap increases for each subsequent slave.Type: GrantFiled: June 29, 2021Date of Patent: November 22, 2022Assignee: MELEXIS TECHNOLOGIES NVInventors: Eric Sachse, Torsten Bacher, Thomas Freitag
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Publication number: 20220116075Abstract: A transmitter device for transmission of data via DC power distribution lines includes a sequence generator arranged for receiving a raw data bit stream to be transmitted over a positive and a negative DC power distribution line and for deriving a switching sequence based on the raw data bit stream, and a circuit including one or more capacitors and a plurality of switches controllable with the switching sequence derived in the sequence generator. The circuit is arranged for injecting in the positive and negative DC power distribution lines symmetric displacement currents resulting from displacing charges on the one or more capacitors when the one or more capacitors are charged or discharged according to the switching sequence. The symmetric displacement currents give rise to changes in voltage of the same magnitude and opposite polarity on the positive and negative DC power distribution lines.Type: ApplicationFiled: October 7, 2021Publication date: April 14, 2022Inventors: Andreas OTT, Federico D'ANIELLO, Thomas FREITAG, Andrea BASCHIROTTO
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Patent number: 11281576Abstract: A memory device includes a non-volatile memory block, a protection unit arranged for connecting to a communication bus, and a sequencer arranged to receive commands from the protection unit. A logic circuit is arranged to output an enabling signal, and includes first and second logic subcircuits, and a combiner logic circuit.Type: GrantFiled: May 20, 2020Date of Patent: March 22, 2022Assignee: MELEXIS TECHNOLOGIES NVInventors: Nicolas Vielcanet, Philippe Laugier, Thomas Freitag, Benoit Heroux
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Patent number: 11234579Abstract: A resectoscope has an elongated shaft tube, an elongated optic arranged therein with a lens at the distal end and an electrode assembly, wherein the electrode assembly in turn includes an electrode arranged at the distal end of the arms of a fork assembly, which are arranged on opposing sides of the lens and are brought together in a transition region to an electrode shaft, wherein the electrode assembly can be extended in the longitudinal direction by a stroke length from a first position, in which the electrode is arranged inside the shaft tube in front of the lens, into a second position in which the arms of the fork assembly protrude out of the shaft tube. The length of the arms of the fork assembly is thereby greater than 1.2 times the stroke length. The electrode assembly is configured correspondingly.Type: GrantFiled: March 7, 2017Date of Patent: February 1, 2022Assignee: OLYMPUS WINTER & IBE GMBHInventors: Sebastian Stühle, Nils Kapfermann, Thomas Freitag, Andreas Kaiser, Christian Brockmann
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Publication number: 20210406210Abstract: A method for communicating between a master and a plurality of slaves includes generating a communication frame including generating a slave data frame in each slave. The slave data frame has a data packet including one or more data bytes and at least one gap of variable time length comprising no information in the slave data frame. The gap may be at the beginning of said slave data frame before the beginning of the first data byte of said data packet and/or at the end of said data packet after the end of a last data byte of said data packet, where the gaps have a time length dependency based on parameters locally stored in each of said at least one slave. The slave data frame is transmitted sequentially where the gap increases for each subsequent slave.Type: ApplicationFiled: June 29, 2021Publication date: December 30, 2021Inventors: Eric SACHSE, Torsten BACHER, Thomas FREITAG
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Patent number: 11102031Abstract: The present invention relates to a receiver circuit for processing an incoming bit stream from a bus system. The circuit comprises an analog interface for converting the analog signal to a digital input data stream. The interface comprises an analog filter and a switch to process the analog signal before generating the digital input data stream using the filter if, and only if, a selection criterion controlling the switch is met. The circuit comprises a frame decoding unit for decoding a data frame encoded in the digital input data stream in accordance with a CAN protocol, and a frame processing unit that comprises a flexible data rate detector and a recessive bit counter for counting consecutive recessive bits after detecting the flexible data rate frame. The selection criterion is satisfied when the flexible data rate frame is detected and unsatisfied when the recessive bit counter reaches a predetermined number.Type: GrantFiled: May 28, 2019Date of Patent: August 24, 2021Assignee: MELEXIS TECHNOLOGIES NVInventors: Martin Bölter, Thomas Freitag, Jörgen Sturm, Anton Babushkin
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Patent number: 11034581Abstract: Disclosed is a method and a device for the continuous neutralization of hydrochloric acid at an industrial scale.Type: GrantFiled: January 18, 2018Date of Patent: June 15, 2021Assignee: Covestro Deutschland AGInventors: Andreas Brachmann, Thomas Freitag, Juergen Hecke, Axel Hirschberg, Wolfgang Kern, Martin Leipnitz, Ralf Friedrichsen, Volker Rossmann
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Patent number: 10964611Abstract: An edge crack monitoring system for an integrated circuit provided on a die, comprises a conductive trace comprising at least a first conductive path for allowing current in a first direction, and a second adjacent conductive path for allowing current in a second direction opposite to the first direction. Both adjacent conductive paths form at least one loop surrounding a semiconductor device on a die. The arrangement of the trace is adapted to provide compensation of EM interferences. The trace comprises two terminals being connectable to a detection circuit for detecting damages by generating a fault signal upon detection of disruption of the conductive trace due to a damage. The conductive trace comprises high resistance portions with a resistance of at least 1 k?, adapted for reducing self-resonance.Type: GrantFiled: November 21, 2017Date of Patent: March 30, 2021Assignee: MELEXIS TECHNOLOGIES NVInventors: Gunnar Munder, Heiko Grimm, Thomas Freitag
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Patent number: 10965230Abstract: A brushless DC motor driver for driving a brushless DC motor which comprises at least one coil wherein the control unit is adapted for applying a PWM driving signal to the at least one coil of the brushless DC motor such that a current through the at least one coil is always bigger than a pre-defined undercurrent limit.Type: GrantFiled: March 16, 2018Date of Patent: March 30, 2021Assignee: MELEXIS BULGARIA LTDInventors: Xing Zuo, Dirk Leman, Thomas Freitag
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Publication number: 20200394132Abstract: A memory device includes a non-volatile memory block, a protection unit arranged for connecting to a communication bus, and a sequencer arranged to receive commands from the protection unit. A logic circuit is arranged to output an enabling signal, and includes first and second logic subcircuits, and a combiner logic circuit.Type: ApplicationFiled: May 20, 2020Publication date: December 17, 2020Inventors: Nicolas VIELCANET, Philippe LAUGIER, Thomas FREITAG, Benoit HEROUX