Abstract: A method and system are provided for synchronizing a digital video system that includes a transmitter, a receiver, and a decoder. A transport packet is received from the transmitter. At the start of receiving the transport packet, a system time clock timestamp is captured. A program clock reference timestamp is also obtained from the transport packet and is compared with the system time clock timestamp.

Abstract: A method and system for transferring a transport stream, such as from a satellite receiver to a networked computer system, are provided. The transport stream is parsed to derive multiple elementary streams including associated program identifiers, which are used to determine corresponding transfer locations in a host memory. Direct memory access transfers of the multiple elementary streams are then performed to the corresponding transfer locations in the host memory.

Abstract: A method and system are provided for processing a data transport stream. The transport stream is parsed to derive multiple elementary substreams, each of which includes a received media access control address. The received media access control address is then compared in hardware against several stored media access control addresses.

Abstract: A disk resident system for managing defective data sector information in a defective data sector map in a headerless format magnetic disk device. The defective data sector map is stored in gaps between fields in the headerless disk format itself or in existing disk administration fields. The defective data sector map includes a plurality of binary digits that individually correspond to a defective or non-defective status of an individual data sector on at least one section of at least one track proximate to the defective data sector map. The defective data sector map can be minimized by compressing repetitive 0's or 1's in the map. ECC coding and/or other redundancy checks can be included to ensure validity of the defective data sector map.

Abstract: A single integrated circuit includes an on-board processor, a peripheral port, and a general purpose input/output (I/O) circuit that support both master mode and slave mode operations. In a master mode of operation, the integrated circuit functions as a disk drive microcontroller and seamlessly interfaces with a hard disk controller. The integrated circuit includes programmable circuitry for generating individual chip select signals for external random access memory (RAM) and external read-only memory (ROM); a fully programmable general purpose input/output interface; and a programmable bi-directional peripheral port. Each of these features are utilized in the master mode to control operation of the disk drive. In a slave mode of operation, the integrated circuit provides full motion control of the spin and tracking systems of a disk drive. In slave mode, the peripheral port is an interface to a host microcontroller or a host RISC processor, that is typically contained within the disk drive.