Abstract: A hierarchical network enables access for a stacked memory system including or more memory dies that each include multiple memory tiles. The processor die includes multiple processing tiles that are stacked with the one or more memory die. The memory tiles that are vertically aligned with a processing tile are directly coupled to the processing tile and comprise the local memory block for the processing tile. The hierarchical network provides access paths for each processing tile to access the processing tile's local memory block, the local memory block coupled to a different processing tile within the same processing die, memory tiles in a different die stack, and memory tiles in a different device. The ratio of memory bandwidth (byte) to floating-point operation (B:F) may improve 50× for accessing the local memory block compared with conventional memory. Additionally, the energy consumed to transfer each bit may be reduced by 10×.

Abstract: Disclosed are systems and methods for generating graphical displays of analyte data and/or health information. In some implementations, the graphical displays are generating based on a self-referential dataset that are modifiable based on identified portions of the data. The modified graphical displays can indicate features in the analyte data of a host.

Abstract: Systems and methods of the present disclosure include at least one building component detection sensor device configured to be deployed within (or proximate to) a building comprised of a plurality of building components. The at least one building component detection sensor device is configured to detect data relating to at least one building component of the plurality of building components. In addition, a building component property determination system includes a processor configured to execute instructions stored in memory to determine one or more properties of the at least one building component based at least in part on the data detected by the at least one building component detection sensor device.

Abstract: An avionics unit assembly for an aircraft can include an avionics unit (e.g., an underwater locator device, “ULD”), and a battery to power the avionics unit. The avionics unit assembly can further include a housing that encases the avionics unit and the battery. The housing includes a vent port for exhausting an emission from the housing during a failure of the avionics unit. The avionics unit assembly can further include one or more of a suppressor that filters the emission, a shield element that is resistant to chemical and/or thermal effects of the emission, and a bracket for mounting the avionics unit to a surface. A method integrating the avionics unit assembly onto a forward aircraft bulkhead at a mount location under an aircraft radome and for manufacturing the avionics unit, and an aircraft including the avionics unit are also described.

Abstract: Pre-connected analyte sensors are provided. A pre-connected analyte sensor includes a sensor carrier attached to an analyte sensor. The sensor carrier includes a substrate configured for mechanical coupling of the sensor to testing, calibration, or wearable equipment. The sensor carrier also includes conductive contacts for electrically coupling sensor electrodes to the testing, calibration, or wearable equipment.

Abstract: Disclosed are systems and methods for generating graphical displays of analyte data and/or health information. In some implementations, the graphical displays are generating based on a self-referential dataset that are modifiable based on identified portions of the data. The modified graphical displays can indicate features in the analyte data of a host.

Abstract: An aircraft wing is disclosed having a main fixed wing portion and a wing tip device at a tip thereof. The wing tip device is configurable between a flight configuration and a ground configuration, in which ground configuration the wing tip device is moved away from the flight configuration such that the span of the aircraft wing is reduced. A hinge arrangement connects the main fixed wing portion and the wing tip device and enables the wing tip device to rotate between the ground configuration and the flight configuration. The hinge arrangement protrudes beyond an outer surface of the main fixed wing portion and wing tip device. A fairing covers at least part of the hinge arrangement on at least a suction side of the wing.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable characterization circuits are coupled to inputs to the bit generating cells to affect the outputs of the bit generating cells. Based on the effect of the characterization circuit(s) on the outputs of the bit generating cells, a subset less than all of the bit generating cells is selected.

Abstract: Embodiments of the present disclosure relate to application partitioning for locality in a stacked memory system. In an embodiment, one or more memory dies are stacked on the processor die. The processor die includes multiple processing tiles and each memory die includes multiple memory tiles. Vertically aligned memory tiles are directly coupled to and comprise the local memory block for a corresponding processing tile. An application program that operates on dense multi-dimensional arrays (matrices) may partition the dense arrays into sub-arrays associated with program tiles. Each program tile is executed by a processing tile using the processing tile's local memory block to process the associated sub-array. Data associated with each sub-array is stored in a local memory block and the processing tile corresponding to the local memory block executes the program tile to process the sub-array data.

Abstract: A hierarchical network enables access for a stacked memory system including or more memory dies that each include multiple memory tiles. The processor die includes multiple processing tiles that are stacked with the one or more memory die. The memory tiles that are vertically aligned with a processing tile are directly coupled to the processing tile and comprise the local memory block for the processing tile. The hierarchical network provides access paths for each processing tile to access the processing tile’s local memory block, the local memory block coupled to a different processing tile within the same processing die, memory tiles in a different die stack, and memory tiles in a different device. The ratio of memory bandwidth (byte) to floating-point operation (B:F) may improve 50x for accessing the local memory block compared with conventional memory. Additionally, the energy consumed to transfer each bit may be reduced by 10x.

Abstract: A mapper within a single-level memory system may facilitate memory localization to reduce the energy and latency of memory accesses within the single-level memory system. The mapper may translate a memory request received from a processor for implementation at a data storage entity, where the translating identifies a data storage entity and a starting location within the data storage entity where the data associated with the memory request is located. This data storage entity may be co-located with the processor that sent the request, which may enable the localization of memory and significantly improve the performance of memory usage by reducing an energy of data access and increasing data bandwidth.

Abstract: Embodiments of the present disclosure relate to memory stacked on processor for high bandwidth. Systems and methods are disclosed for providing a one-level memory for a processing system by stacking bulk memory on a processor die. In an embodiment, one or more memory dies are stacked on the processor die. The processor die includes multiple processing tiles, where each tile includes a processing unit, mapper, and tile network. Each memory die includes multiple memory tiles. The processing tile is coupled to each memory tile that is above or below the processing tile. The vertically aligned memory tiles comprise the local memory block for the processing tile. The ratio of memory bandwidth (byte) to floating-point operation (B:F) may improve 50× for accessing the local memory block compared with conventional memory. Additionally, the energy consumed to transfer each bit may be reduced by 10×.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable current sources is coupled to introduce perturbations into outputs of the bit generating cells. Based on the perturbations, the outputs of a subset less than all of the bit generating cells are selected, and applied as a control.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable characterization circuits are coupled to inputs to the bit generating cells to affect the outputs of the bit generating cells. Based on the effect of the characterization circuit(s) on the outputs of the bit generating cells, a subset less than all of the bit generating cells is selected.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable current sources is coupled to introduce perturbations into outputs of the bit generating cells. Based on the perturbations, the outputs of a subset less than all of the bit generating cells are selected, and applied as a control.

Abstract: Described embodiments provide systems and methods for resource appropriation in a multi-tenant environment using risk and value modeling. A resource server can provide a plurality of applications access to a plurality of resources in response to requests from clients based in part on risk scores and value scores. The resource server can generate and execute a risk model and a value model to determine a risk score and a value score for each of the applications. The resource server can use the risk and value scores to determine access to a particular resource for a requested application. The resource server can assign a first allocation of resource tokens to an application. The resource tokens can correspond to access privileges to plurality of resources. The resource server can dynamically modify the resource allocation for applications responsive to changes to a risk score or value score of a respective application.

Abstract: Described embodiments provide systems and methods for resolving Domain Name Service (DNS) requests. An authoritative DNS server may receive, from a recursive resolver, a DNS request to resolve a query on behalf of a client. The authoritative DNS server may determine whether the recursive resolver is classified as a non-client representative resolver or a client representative resolver. The authoritative DNS server may identify a redirect server based on the recursive resolver classified as the non-client representative resolver or the resolved server based on the recursive resolver classified as the client representative resolver. The authoritative DNS server may transmit, to the recursive resolver, a response to the DNS request including an address of one of the redirect server or the resolved server.

Abstract: Systems, methods, and computer-readable media are disclosed for systems and methods for device agnostic user interface generation. Example methods include receiving a request for content from a device, determining first data representing a first device characteristic of the device, and determining an intended viewing distance value associated with the first data. Some methods include determining, using the intended viewing distance value, a first value for the device, the first value representing a baseline density-independent number of pixels, determining first content using the first value, and sending the first content to the device, where the first content is to be rendered at the device.

Abstract: Described embodiments provide systems and methods for resource appropriation in a multi-tenant environment using risk and value modeling. A resource server can provide a plurality of applications access to a plurality of resources in response to requests from clients based in part on risk scores and value scores. The resource server can generate and execute a risk model and a value model to determine a risk score and a value score for each of the applications. The resource server can use the risk and value scores to determine access to a particular resource for a requested application. The resource server can assign a first allocation of resource tokens to an application. The resource tokens can correspond to access privileges to plurality of resources. The resource server can dynamically modify the resource allocation for applications responsive to changes to a risk score or value score of a respective application.

Abstract: Systems and methods for presenting a user interface in a first mode and a second mode based on detection of a touch gesture is described herein. In some embodiments, a first user interface may be presented on an electronic device's display. The first user interface may include a list of items, which may be formatted such that they are optimally viewable from a first distance away from the display. In response to detecting a touch gesture, such as a scrolling gesture, a second user interface may be presented including the list of items, which may be formatted such that they are optimally viewed from a second distance. For example, the first user interface may be optimally viewable from a distance of approximately seven to ten feet from the display. As another example, the second user interface may optimally viewable from a distance of approximately one to three feet.