Patents by Inventor Thomas Gaertner

Thomas Gaertner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9453573
    Abstract: A continuously variable transmission assembly includes a driving pulley rotatable about a driving pulley axis and a driven pulley rotatable about a driven pulley axis. An endless belt operatively connecting the pulleys defines a belt reference plane, the driving and driven pulley axes passing therethrough. A housing encloses a space, the driving pulley, the driven pulley, and the belt being disposed at least in part therein. A driven pulley inlet and outlet defined in the housing are disposed closer to the driven pulley than the driving pulley. The driven pulley inlet, disposed on a first side of the belt reference plane, is configured to direct air from outside the housing into the space toward the driven pulley. The driven pulley outlet is disposed on a second side of the belt reference plane. Air flows from the space to the outside of the housing via the driven pulley outlet.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: September 27, 2016
    Assignee: BRP-POWERTRAIN GMBH & CO. KG
    Inventors: Marc Renner, Thomas Gaertner, Gerhard Wiesinger
  • Patent number: 9239342
    Abstract: A sensor arrangement for measuring an electric voltage (Uterm), wherein the potential point, at which the electric voltage relative to a defined electric potential, in particular relative to earth, is intended to be measured, is connected to a capacitor, to which a comparator unit is connected which ascertains whether a first defined threshold voltage (Uref) is present at the capacitor, wherein the sensor arrangement is configured such that it provides an output signal which is dependent on at least one charging process of the capacitor and includes at least the information of the charging time for charging the capacitor to the first defined threshold voltage.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: January 19, 2016
    Assignee: Continental Teves AG & Co. oHG
    Inventors: Wolfgang Jöckel, Timo Dietz, Thomas Gaertner, Helge Grasshoff
  • Publication number: 20150377341
    Abstract: A continuously variable transmission assembly includes a driving pulley rotatable about a driving pulley axis and a driven pulley rotatable about a driven pulley axis. An endless belt operatively connecting the pulleys defines a belt reference plane, the driving and driven pulley axes passing therethrough. A housing encloses a space, the driving pulley, the driven pulley, and the belt being disposed at least in part therein. A driven pulley inlet and outlet defined in the housing are disposed closer to the driven pulley than the driving pulley. The driven pulley inlet, disposed on a first side of the belt reference plane, is configured to direct air from outside the housing into the space toward the driven pulley. The driven pulley outlet is disposed on a second side of the belt reference plane. Air flows from the space to the outside of the housing via the driven pulley outlet.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 31, 2015
    Inventors: Marc RENNER, Thomas GAERTNER, Gerhard WIESINGER
  • Patent number: 9009413
    Abstract: A processor includes a processor core including an execution unit to execute instructions, and a cache memory. The cache memory includes a controller to update each of a plurality of stale indicators in response to a lazy flush instruction. Each stale indicator is associated with respective data, and each updated stale indicator is to indicate that the respective data is stale. The cache memory also includes a plurality of cache lines. Each cache line is to store corresponding data and a foreground tag that includes a respective virtual address associated with the corresponding data, and that includes the associated stale indicator. Other embodiments are described as claimed.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: April 14, 2015
    Assignee: Intel Corporation
    Inventors: Varun K. Mohandru, Fernando Latorre, Niranjan L. Cooray, Pedro Lopez, Naveen Neelakantam, Li-Gao Zei, Rami May, Jaroslaw Topp, Thomas Gaertner
  • Publication number: 20140181388
    Abstract: A processor includes a processor core including an execution unit to execute instructions, and a cache memory. The cache memory includes a controller to update each of a plurality of stale indicators in response to a lazy flush instruction. Each stale indicator is associated with respective data, and each updated stale indicator is to indicate that the respective data is stale. The cache memory also includes a plurality of cache lines. Each cache line is to store corresponding data and a foreground tag that includes a respective virtual address associated with the corresponding data, and that includes the associated stale indicator. Other embodiments are described as claimed.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: Varun K. Mohandru, Fernando Latorre, NIRANJAN L. COORAY, Pedro Lopez, NAVEEN NEELAKANTAM, LI-GAO ZEI, RAMI MAY, JAROSLAW TOPP, THOMAS GAERTNER
  • Publication number: 20140015513
    Abstract: A sensor arrangement for measuring an electric voltage (Uterm), wherein the potential point, at which the electric voltage relative to a defined electric potential, in particular relative to earth, is intended to be measured, is connected to a capacitor, to which a comparator unit is connected which ascertains whether a first defined threshold voltage (Uref) is present at the capacitor, wherein the sensor arrangement is configured such that it provides an output signal which is dependent on at least one charging process of the capacitor and includes at least the information of the charging time for charging the capacitor to the first defined threshold voltage.
    Type: Application
    Filed: March 29, 2012
    Publication date: January 16, 2014
    Applicant: CONTINENTAL TEVES AG & CO. OHG
    Inventors: Wolfgang Jöckel, Timo Dietz, Thomas Gaertner, Helge Grasshoff
  • Publication number: 20130214804
    Abstract: The invention relates to a current sensor including at least one resistance element on which voltage (UGS) for measuring the current (iMEAS) flowing through the resistance element is detected. The resistance element is designed so that at least, within a defined measurement range of the current sensor, the electric resistance of the resistance element reduces when the current (iMEAS) flowing through the resistance element increases.
    Type: Application
    Filed: July 1, 2011
    Publication date: August 22, 2013
    Applicant: CONTINENTAL TEVES AG & CO. OHG
    Inventors: Timo Dietz, Wolfgang Jöckel, Klaus Rink, Thomas Gaertner, Helge Grasshoff
  • Patent number: 8468903
    Abstract: A shifting sleeve for selectively engaging a transmission gear in a vehicle transmission is provided. The transmission gear has at least one opening defined therein. The shifting sleeve comprises at least one tooth for selectively engaging the at least one opening defined in the transmission gear. The at least one tooth extends from the shifting sleeve body and has a first portion, a second portion and a third portion. The first portion has a top surface disposed at a first height and the second portion has a top surface disposed at a second height, the first height being greater than the second height. The third portion is disposed between the first and second portions, and has a top surface disposed at an angle and extending between the top surfaces of the first and second portions.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: June 25, 2013
    Assignee: BRP Powertrain GmbH & Co. KG
    Inventors: Michael Gumpesberger, Thomas Gaertner, Gerhard Wiesinger, Friedrich Neuwirth
  • Patent number: 8401012
    Abstract: An embodiment may include circuitry to determine, at least in part, at least one first output to which to route at least one packet, based, at least in part upon, a first output determination and a second output determination. The first output determination may select at least one second output based at least in part upon at least one deterministic output selection algorithm. The second output determination may select at least one third output based at least in part upon at least one pseudo-random output selection algorithm. The at least one pseudo-random output selection algorithm may be based, at least in part, upon a counter value. Many modifications, variations, and alternatives are possible without departing from this embodiment.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: March 19, 2013
    Assignee: Intel Corporation
    Inventors: Keith D. Underwood, Norbert Foerster, Thomas Gaertner
  • Publication number: 20120192665
    Abstract: A shifting sleeve for selectively engaging a transmission gear in a vehicle transmission is provided. The transmission gear has at least one opening defined therein. The shifting sleeve comprises at least one tooth for selectively engaging the at least one opening defined in the transmission gear. The at least one tooth extends from the shifting sleeve body and has a first portion, a second portion and a third portion. The first portion has a top surface disposed at a first height and the second portion has a top surface disposed at a second height, the first height being greater than the second height. The third portion is disposed between the first and second portions, and has a top surface disposed at an angle and extending between the top surfaces of the first and second portions.
    Type: Application
    Filed: January 31, 2011
    Publication date: August 2, 2012
    Applicant: BRP-POWERTRAIN GMBH & CO KG
    Inventors: Michael GUMPESBERGER, Thomas GAERTNER, Gerhard WIESINGER, Friedrich NEUWIRTH
  • Publication number: 20120063459
    Abstract: An embodiment may include circuitry to determine, at least in part, at least one first output to which to route at least one packet, based, at least in part upon, a first output determination and a second output determination. The first output determination may select at least one second output based at least in part upon at least one deterministic output selection algorithm. The second output determination may select at least one third output based at least in part upon at least one pseudo-random output selection algorithm. The at least one pseudo-random output selection algorithm may be based, at least in part, upon a counter value. Many modifications, variations, and alternatives are possible without departing from this embodiment.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 15, 2012
    Inventors: Keith D. Underwood, Norbert Foerster, Thomas Gaertner
  • Patent number: 6855630
    Abstract: A method makes contact with a doping region formed at a substrate surface of a substrate. An insulating layer is applied on the substrate surface and a contact hole is formed in the insulating layer. A metal-containing layer is subsequently deposited on the insulating layer and the surface region of the doping region that is uncovered by the contact hole. In a subsequent thermal process having two steps, first the metal-containing layer is reacted with the silicon of the doping region to form a metal silicide layer and then the rest of the metal-containing layer is converted into a metal-nitride-containing layer in a second thermal step.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: February 15, 2005
    Assignee: Infineon Technologies AG
    Inventors: Alexander Ruf, Norbert Urbansky, Wilhelm Claussen, Thomas Gärtner, Sven Schmidbauer
  • Patent number: 6794312
    Abstract: A process for producing a nitrided oxide layer on a silicon semiconductor substrate includes introducing a multiplicity of wafers into an atmospheric batch furnace, carrying out an oxidation step at a first predetermined temperature, carrying out a nitriding step at a second predetermined temperature, and carrying out a reoxidation step at a third predetermined temperature. The wafers are then cooled and removed from the atmospheric batch furnace.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: September 21, 2004
    Assignee: Infineon Technologies AG
    Inventors: Ayad Abdul-Hak, Thomas Gaertner, Joerg Schulze
  • Patent number: 6528433
    Abstract: The novel method allows monitoring of nitrogen processes by making use of the fact that the incorporation of nitrogen near the surface in silicon, or in a thin silicon nitride layer on the silicon surface, inhibits the diffusion of oxygen during the subsequent thermal oxidation. Accordingly, the oxidation rate of the thermal oxidation is reduced and the growth of the oxide layer on the silicon surface is inhibited. The thickness of the oxide layer is thus used as a measure for the nitrogen content, i.e., for the quality of the nitrogen process.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: March 4, 2003
    Assignee: Infineon Technologies AG
    Inventors: Thomas Gärtner, Alexandra Lamprecht, Dietmar Ottenwälder, Jörg Schulze
  • Publication number: 20030032307
    Abstract: A process for producing a nitrided oxide layer on a silicon semiconductor substrate includes introducing a multiplicity of wafers into an atmospheric batch furnace, carrying out an oxidation step at a first predetermined temperature, carrying out a nitriding step at a second predetermined temperature, and carrying out a reoxidation step at a third predetermined temperature. The wafers are then cooled and removed from the atmospheric batch furnace.
    Type: Application
    Filed: July 11, 2002
    Publication date: February 13, 2003
    Inventors: Ayad Abdul-Hak, Thomas Gaertner, Joerg Schulze
  • Patent number: 6436846
    Abstract: A combined preanneal/oxidation step using a rapid thermal process (RTP) for treatment of a silicon wafer to form a thermal oxide of a given thickness while simultaneously adjusting the denuded zone depth and bulk micro defect density (BMD) comprising: exposing the wafer to a controlled temperature and a controlled preannealing time in an oxidation ambient at ambient pressure to obtain a target thermal oxide thickness that is preselected to correspond to a preselected denuded zone depth.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: August 20, 2002
    Assignee: Siemens Aktiengesellscharft
    Inventors: Helmut Horst Tews, Martin Schrems, Thomas Gaertner