Patents by Inventor Thomas Grabolla

Thomas Grabolla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8932405
    Abstract: A reactor arrangement for layer deposition on a plurality of substrates (hereafter substrates) comprising a first reactor chamber for simultaneous cleaning the substrates, at least one second reactor chamber for depositing at least one layer on each of the substrates, a first heating device for setting the substrate temperature of the substrates in the first reactor chamber, a second heating device for setting the substrate temperature of the substrates in the second reactor chamber, a device for producing a gas atmosphere of predetermined composition and predetermined pressure, a transport device for transporting the substrates simultaneously from the first to the second reactor chamber, and a control device for controlling the heating devices and device for producing the gas atmosphere in such a way that the substrates are moved or stored in an interruption-free manner in a reducing gas atmosphere as long as the substrate temperature is above critical temperature Tc.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: January 13, 2015
    Assignee: IHP GmbH—Innovations for High Performance Microelectronics/Institut fur Innovative Mikroelektronik
    Inventors: Thomas Grabolla, George Ritter, Bernd Tillack
  • Publication number: 20080050929
    Abstract: A method of depositing layers on a plurality of semiconductor substrates simultaneously, comprising the steps: cleaning of at least one respective surface of the substrates in a first reactor at a first substrate temperature Tred, transport of the substrates from the first reactor into a second reactor, and subsequent deposition of at least one respective layer on the semiconductor substrates in the second reactor at a second substrate temperature Tdep, wherein the semiconductor substrates are moved or stored during the cleaning step and during transport from the first reactor into the second reactor in an interruption-free manner in a reducing gas atmosphere as long as the substrate temperature is above a critical temperature Tc which is dependent on the substrate material and the material of the at least one layer to be deposited.
    Type: Application
    Filed: May 10, 2005
    Publication date: February 28, 2008
    Inventors: Thomas Grabolla, George Ritter, Bernd Tillack
  • Patent number: 7244667
    Abstract: System for producing diffusion-inhibiting epitaxial semiconductor layers, by means of which thin diffusion-inhibiting, epitaxial semiconductor layers can be produced on large semiconductor substrates at a high throughput. The surfaces of the semiconductor substrates to be coated are first cleaned, and the substrates are then heated in a low pressure batch reactor to a first temperature (prebake temperature). The surfaces to be coated are next subjected to a hydrogen prebake operation at a first reactor pressure. In the next step the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor to a second temperature (deposition temperature) lower than the first temperature, and after a condition of thermodynamic equilibrium is reached the diffusion-inhibiting semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition process (CVD) at a second reactor pressure higher than, equal to or lower than the first reactor pressure.
    Type: Grant
    Filed: July 25, 2002
    Date of Patent: July 17, 2007
    Inventors: Bernd Tillack, Dirk Wolansky, Georg Ritter, Thomas Grabolla
  • Publication number: 20040266142
    Abstract: System for producing diffusion-inhibiting epitaxial semiconductor layers, by means of which thin diffusion-inhibiting, epitaxial semiconductor layers can be produced on large semiconductor substrates at a high throughput. The surfaces of the semiconductor substrates to be coated are first cleaned, and the substrates are then heated in a low pressure batch reactor to a first temperature (prebake temperature). The surfaces to be coated are next subjected to a hydrogen prebake operation at a first reactor pressure. In the next step the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor to a second temperature (deposition temperature) lower than the first temperature, and after a condition of thermodynamic equilibrium is reached the diffusion-inhibiting semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition process (CVD) at a second reactor pressure higher than, equal to or lower than the first reactor pressure.
    Type: Application
    Filed: August 16, 2004
    Publication date: December 30, 2004
    Inventors: Bernd Tillack, Dirk Wolansky, Georg Ritter, Thomas Grabolla