Patents by Inventor Thomas Graettinger

Thomas Graettinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7932550
    Abstract: An etching process includes providing a dielectric first film on a substrate and a sacrificial second film on the dielectric first film. A conductive structure such as a container capacitor is formed in a recess in the first and second films. The conductive structure is exposed as to its external surface by an etch process that resists destructive collapse of the conductive structure.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: April 26, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Kevin Torek, Kevin Shea, Thomas Graettinger
  • Patent number: 7468323
    Abstract: An etching process includes providing a dielectric first film on a substrate and a sacrificial second film on the dielectric first film. A conductive structure such as a container capacitor is formed in a recess in the first and second films. The conductive structure is exposed as to its external surface by an etch process that resists destructive collapse of the conductive structure.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: December 23, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Kevin Torek, Kevin Shea, Thomas Graettinger
  • Publication number: 20080012093
    Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.
    Type: Application
    Filed: September 21, 2007
    Publication date: January 17, 2008
    Inventors: Marsela Pontoh, Cem Basceri, Thomas Graettinger
  • Publication number: 20070232013
    Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
    Type: Application
    Filed: May 1, 2007
    Publication date: October 4, 2007
    Inventors: H. Manning, Thomas Graettinger
  • Publication number: 20070187738
    Abstract: A process of making a stud capacitor structure is disclosed. The process includes embedding the stud in a dielectric stack. In one embodiment, the process includes forming an electrically conductive seed film in a contact corridor of the dielectric stack. A storage cell stud is also disclosed. The storage cell stud can be employed in a dynamic random-access memory device. An electrical system is also disclosed that includes the storage cell stud.
    Type: Application
    Filed: April 11, 2007
    Publication date: August 16, 2007
    Inventor: Thomas Graettinger
  • Publication number: 20070114586
    Abstract: An electrical contact includes a non-conductive spacer surrounding conductive plug material along the full height of the contact. The spacer inhibits oxide and other diffusion through the contact. In the illustrated embodiment, the contact includes metals or metal oxides which are resistant to oxidation, and additional conductive barrier layers. The contact is particularly useful in integrated circuits which include high dielectric constant materials.
    Type: Application
    Filed: January 23, 2007
    Publication date: May 24, 2007
    Inventors: Thomas Graettinger, F. Daniel Gealy
  • Publication number: 20070075349
    Abstract: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing the noble metal is selectively deposited onto the first region relative to the second region. In particular applications, the first region can comprise borophosphosilicate glass, and the second region can comprise either aluminum oxide or doped non-oxidized silicon. The invention also includes capacitor constructions and methods of forming capacitor constructions.
    Type: Application
    Filed: October 31, 2006
    Publication date: April 5, 2007
    Inventors: Cancheepuram Srividya, F. Gealy, Thomas Graettinger
  • Publication number: 20070069270
    Abstract: An improved charge storing device and methods for providing the same, the charge storing device comprising a conductor-insulator-conductor (CIC) sandwich. The CIC sandwich comprises a first conducting layer deposited on a semiconductor integrated circuit. The CIC sandwich further comprises a first insulating layer deposited over the first conducting layer in a flush manner. The first insulating layer comprises a structure having a plurality of oxygen cites and a plurality of oxygen atoms that partially fill the oxygen cites, wherein the unfilled oxygen cites define a concentration of oxygen vacancies.
    Type: Application
    Filed: April 4, 2006
    Publication date: March 29, 2007
    Inventors: Cem Basceri, Howard Rhodes, Gurtej Sandhu, F. Gealy, Thomas Graettinger
  • Publication number: 20070052115
    Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
    Type: Application
    Filed: November 9, 2006
    Publication date: March 8, 2007
    Inventors: H. Manning, Thomas Graettinger
  • Publication number: 20070049037
    Abstract: This invention includes methods of forming openings into dielectric material. In one implementation, an opening is partially etched through dielectric material, with such opening comprising a lowest point and opposing sidewalls of the dielectric material. At least respective portions of the opposing sidewalls within the opening are lined with an electrically conductive material. With such electrically conductive material over said respective portions within the opening, plasma etching is conducted into and through the lowest point of the dielectric material of the opening to extend the opening deeper within the dielectric material. Other aspects and implementations are contemplated.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 1, 2007
    Inventors: Thomas Graettinger, John Zahurak, Shane Trapp, Thomas Figura
  • Publication number: 20070045693
    Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 1, 2007
    Inventors: H. Manning, Thomas Graettinger
  • Publication number: 20070001207
    Abstract: A method for forming a double sided container capacitor comprises forming a first capacitor top plate layer within a recess in a dielectric layer, then forming a first cell dielectric on the first top plate layer. Next, first and second bottom plate layers are formed on the first cell dielectric layer, and a second cell dielectric layer is formed on the second bottom plate layers. Finally, a second top plate layer is formed on the second cell dielectric layer, and the first and second top plate layers are electrically connected using a conductive plug or conductive spacer. An inventive structure formed using the inventive method is also described.
    Type: Application
    Filed: September 7, 2006
    Publication date: January 4, 2007
    Inventors: Thomas Graettinger, Marsela Pontoh, Thomas Figura
  • Publication number: 20060274477
    Abstract: The invention includes capacitor constructions comprising a layer of aluminum oxide between a high-k dielectric material and a layer comprising titanium and nitrogen. The layer comprising titanium and nitrogen can be, for example, titanium nitride and/or boron-doped titanium nitride. The capacitor constructions can be incorporated into DRAM cells, which in turn can be incorporated into electronic systems. The invention also includes methods of forming capacitor constructions.
    Type: Application
    Filed: August 15, 2006
    Publication date: December 7, 2006
    Inventors: Cem Basceri, Thomas Graettinger
  • Publication number: 20060252201
    Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.
    Type: Application
    Filed: July 12, 2006
    Publication date: November 9, 2006
    Inventors: Marsela Pontoh, Cem Basceri, Thomas Graettinger
  • Publication number: 20060249772
    Abstract: The invention includes memory circuitry. In one implementation, memory circuitry includes a memory array comprising a plurality of memory cell capacitors. Individual of the capacitors include a storage node electrode, a capacitor dielectric region, and a cell electrode. The cell electrode is commonly shared among at least some of the plurality of memory cell capacitors within the memory array. The cell electrode within the memory array includes a conductor metal layer including at least one of elemental tungsten, a tungsten alloy, tungsten silicide and tungsten nitride. Polysilicon is received over the conductor metal layer. The conductor metal layer and the polysilicon are received over the storage node electrodes of said at least some of the plurality of memory cell capacitors. Other aspects and implementations are contemplated.
    Type: Application
    Filed: July 5, 2006
    Publication date: November 9, 2006
    Inventor: Thomas Graettinger
  • Publication number: 20060120019
    Abstract: Methods of forming a capacitor are disclosed. The methods may comprise the steps of forming a substrate assembly and forming a first electrode on the substrate assembly. The first electrode may be formed to include at least one non-smooth surface and may be formed from a material selected from the group consisting of transition metals, conductive oxides, alloys thereof, and combinations thereof. The methods may also comprise the step of forming a dielectric on the first electrode and an uppermost surface of the substrate assembly, and forming a second electrode on the dielectric. The second electrode may be formed to include at least one non-smooth surface. Also, the dielectric and the second electrode may be formed only within the first electrode.
    Type: Application
    Filed: January 5, 2006
    Publication date: June 8, 2006
    Inventors: F. Gealy, Thomas Graettinger
  • Publication number: 20060097348
    Abstract: Structures having an electrode formed from a transition metal or a conductive metal oxide are disclosed. The structures may comprise a first electrode made of a material selected from the group consisting of transition metals, conductive metal-oxides, alloys thereof, and combinations thereof The first electrode may comprise a first non-smooth surface, and the first non-smooth surface may comprise a concave hemispherical grain. The structures may also comprise a dielectric in contact with the first electrode and a surface of a substrate assembly.
    Type: Application
    Filed: December 22, 2005
    Publication date: May 11, 2006
    Inventors: F. Gealy, Thomas Graettinger
  • Publication number: 20060063345
    Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
    Type: Application
    Filed: November 10, 2005
    Publication date: March 23, 2006
    Inventors: H. Manning, Thomas Graettinger, Marsela Pontoh
  • Publication number: 20060063344
    Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
    Type: Application
    Filed: November 10, 2005
    Publication date: March 23, 2006
    Inventors: H. Manning, Thomas Graettinger, Marsela Pontoh
  • Publication number: 20060033140
    Abstract: The invention includes memory circuitry. In one implementation, memory circuitry includes a memory array comprising a plurality of memory cell capacitors. Individual of the capacitors include a storage node electrode, a capacitor dielectric region, and a cell electrode. The cell electrode is commonly shared among at least some of the plurality of memory cell capacitors within the memory array. The cell electrode within the memory array includes a conductor metal layer including at least one of elemental tungsten, a tungsten alloy, tungsten silicide and tungsten nitride. Polysilicon is received over the conductor metal layer. The conductor metal layer and the polysilicon are received over the storage node electrodes of said at least some of the plurality of memory cell capacitors. Other aspects and implementations are contemplated.
    Type: Application
    Filed: August 13, 2004
    Publication date: February 16, 2006
    Inventor: Thomas Graettinger