Patents by Inventor Thomas Grimsley

Thomas Grimsley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6998595
    Abstract: An architecture and manufacturing method for photosensitive chips, such as used in office equipment and digital cameras, involves creating grooves between chip areas in a wafer, and then placing a light-transmissive planar layer over the main surface of the wafer. The planar layer, which may be acrylic-based, creates a substantially planar surface over both the photosites in the chip areas and the grooves. The planar layer in turn supports one or more light-transmissive filtering layers. The arrangement avoids damage to the filtering layers when the wafer is diced along the grooves.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: February 14, 2006
    Assignee: Xerox Corporation
    Inventors: Paul A. Hosier, Thomas Grimsley, Josef E. Jedlicka
  • Publication number: 20040164229
    Abstract: An architecture and manufacturing method for photosensitive chips, such as used in office equipment and digital cameras, involves creating grooves between chip areas in a wafer, and then placing a light-transmissive planar layer over the main surface of the wafer. The planar layer, which may be acrylic-based, creates a substantially planar surface over both the photosites in the chip areas and the grooves. The planar layer in turn supports one or more light-transmissive filtering layers. The arrangement avoids damage to the filtering layers when the wafer is diced along the grooves.
    Type: Application
    Filed: February 23, 2004
    Publication date: August 26, 2004
    Applicant: Xerox Corporation
    Inventors: Paul A. Hosier, Thomas Grimsley, Josef E. Jedlicka
  • Publication number: 20020125408
    Abstract: An architecture and manufacturing method for photosensitive chips, such as used in office equipment and digital cameras, involves creating grooves between chip areas in a wafer, and then placing a light-transmissive planar layer over the main surface of the wafer. The planar layer, which may be acrylic-based, creates a substantially planar surface over both the photosites in the chip areas and the grooves. The planar layer in turn supports one or more light-transmissive filtering layers. The arrangement avoids damage to the filtering layers when the wafer is diced along the grooves.
    Type: Application
    Filed: March 8, 2001
    Publication date: September 12, 2002
    Applicant: Xerox Corporation
    Inventors: Paul A. Hosier, Thomas Grimsley, Josef E. Jedlicka
  • Patent number: 6255133
    Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: July 3, 2001
    Assignee: Xerox Corporation
    Inventors: Brian T. Ormond, Josef E. Jedlicka, Thomas Grimsley, Paul A. Hosier
  • Patent number: 6222180
    Abstract: The present invention relates to semiconductor devices with a reduced filter thinning of outer photosites and a method for reducing the thinning of filter layers of the outer photosites. A semiconductor device includes a main surface including a plurality of photosites and bonding pads defined in the main surface, wherein the photosites include inner photosites and outer photosites. The semiconductor device further includes a clear layer deposited over the main surface exclusive of the bonding pads and outer photosites, and a first primary color filter layer deposited over at least first inner photosite and first outer photosite, the first primary color filter transmitting a primary color.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 24, 2001
    Assignee: Xerox Corporation
    Inventors: Brian T. Ormond, Josef E. Jedlicka, Thomas Grimsley
  • Patent number: 6201293
    Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface.
    Type: Grant
    Filed: November 19, 1998
    Date of Patent: March 13, 2001
    Assignee: Xerox Corporation
    Inventors: Brian T. Ormond, Josef E. Jedlicka, Thomas Grimsley, Paul A. Hosier
  • Patent number: 6198093
    Abstract: The present invention relates to semiconductor devices with a reduced filter thinning of outer photosites and a method for reducing the thinning of filter layers of the outer photosites. A semiconductor device includes a main surface including a plurality of photosites and bonding pads defined in the main surface, wherein the photosites include inner photosites and outer photosites. The semiconductor device further includes a clear layer deposited over the main surface exclusive of the bonding pads and outer photosites, and a first primary color filter layer deposited over at least first inner photosite and first outer photosite, the first primary color filter transmitting a primary color.
    Type: Grant
    Filed: November 19, 1998
    Date of Patent: March 6, 2001
    Assignee: Xerox Corporation
    Inventors: Brian T. Ormond, Josef E. Jedlicka, Thomas Grimsley