Patents by Inventor Thomas Haener

Thomas Haener has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119108
    Abstract: Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.
    Type: Application
    Filed: July 21, 2023
    Publication date: April 11, 2024
    Inventors: Thomas HAENER, Martin H. ROETTELER, Krysta M. Svore
  • Publication number: 20230401474
    Abstract: A quantum computing device including a doubly controlled iX (CCiX) circuit. The CCiX circuit may be configured to, in a preparation stage, prepare a plurality of magic states. The CCiX circuit may be further configured to receive a plurality of input qubit states including a first control qubit state, a second control qubit state, and a target qubit state. In an execution stage, the CCiX circuit may be further configured to perform a CCiX operation on the target qubit state at least in part by performing a plurality of local joint measurements. At least a subset of the plurality of local joint measurements may be performed between the plurality of magic states and a plurality of auxiliary qubits. Performing the CCiX operation may further include performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.
    Type: Application
    Filed: June 14, 2022
    Publication date: December 14, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Mathias SOEKEN, Thomas HAENER, Vadym KLIUCHNIKOV, Martin Henri ROETTELER
  • Publication number: 20230401470
    Abstract: A quantum computing device is provided, including a table lookup circuit configured to receive a first table lookup input and a second table lookup input. The table lookup circuit may be further configured to perform a first table lookup operation on the first table lookup input and a second table lookup operation on the second table lookup input in parallel such that a combined table lookup output is written to a combined output register. The combined table lookup output may include a plurality of first table lookup output qubits of the first table lookup operation and a plurality of second table lookup output qubits of the second table lookup operation.
    Type: Application
    Filed: June 14, 2022
    Publication date: December 14, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Mathias SOEKEN, Thomas HAENER, Vadym KLIUCHNIKOV, Martin Henri ROETTELER
  • Patent number: 11829737
    Abstract: This application concerns quantum computing devices and, more specifically, techniques for compiling a high-level description of a quantum program to be implemented in a quantum-computing device into a lower-level program that is executable by a quantum-computing device, where the high-level description of the quantum program to be implemented in a quantum-computing device supports at least one of loops and/or branches.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: November 28, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Mathias Soeken, Martin Roetteler
  • Patent number: 11755682
    Abstract: Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: September 12, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore
  • Publication number: 20230222374
    Abstract: A method for compiling executable code for execution on a computer includes: (a) receiving source code instructing the computer to execute an interval test to determine whether an interval defined by integers a and b encloses an integer x; (b) decomposing the interval test into a first comparison between the integer a and the integer x and a second comparison between the integer b and the integer x; and (c) returning instruction code directing the computer to evaluate the first and second comparisons cooperatively, at lower complexity than the combined complexities of the first and second comparisons enacted separately.
    Type: Application
    Filed: January 7, 2022
    Publication date: July 13, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Mathias SOEKEN, Thomas HAENER
  • Patent number: 11699002
    Abstract: A method to digitally simulate an evolving quantum state of a qubit register of a quantum computer is enacted in a computer system. The quantum state is represented as an array of complex-valued amplitudes, where each amplitude is associated with an individual qubit of the qubit register, and where the quantum state is separable as a product of the individual quantum states of each qubit. One or more quantum-program instructions corresponding to a quantum circuit are received, and the amplitudes of the array are adjusted to reflect a change in the quantum state pursuant to execution of the quantum circuit, the change preserving the separability of the quantum state as a product of individual quantum states of each qubit. One or more of the adjusted amplitudes are then outputted computationally, in such form as to be receivable as input to a computer program.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: July 11, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Vadym Kliuchnikov, Martin Henri Roetteler
  • Patent number: 11580434
    Abstract: Embodiments of the disclosed technology concern transforming a high-level quantum-computer program to one or more symbolic expressions. Because the transformations lead to symbolic expressions in the compiled code, one can extract these to arrive at symbolic resource estimates for the quantum program. In cases where these transformations do not yield closed-form solutions, they can still be evaluated many orders of magnitude faster than it was possible using other resource estimation tools. Having access to such symbolic or near-symbolic expressions not only greatly improves the performance of accuracy management and resource estimation, but also better informs quantum software developers of the bottlenecks that may be present in the quantum program. In turn, the underlying quantum-computer program can be improved as appropriate.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: February 14, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Giulia Meuli, Martin Roetteler
  • Patent number: 11537376
    Abstract: None of the existing quantum programming languages provide specialized support for programming patterns such as conditional-adjoint or adjoint-via-conjugation. As a result, compilers of these languages fail to exploit the optimization opportunities mentioned in this disclosure. Further, none of the available quantum programming languages provide support for automatic translation of circuits using clean qubits to circuits that use idle qubits. Thus, the resulting circuits oftentimes use more qubits than would be required. Embodiments of the disclosed technology, thus allow one to run said circuits on smaller quantum devices. Previous multiplication circuits make use of (expensive) controlled additions. Embodiments of the disclosed technology employ multipliers that work using conditional-adjoint additions, which are cheaper to implement on both near-term and large-scale quantum hardware. The savings lie between 1.5 and 2× in circuit depth for large number of qubits.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: December 27, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Martin Roetteler
  • Publication number: 20220067245
    Abstract: In a method to digitally simulate an evolving quantum state of a qubit register of a quantum computer, the quantum state is represented as a state vector of complex-valued amplitudes, where each amplitude is associated with an individual qubit of the qubit register. A directed acyclic graph defining a set of quantum gates of a quantum-computer program is then received. A linear order for the DAG is constructed by minimizing a partial cost function successively re-computed during construction of the linear order, the partial cost function approximating a cost of transforming the state vector according to a subset of the set of quantum gates applied in the linear order. The state vector is transformed according to the set of quantum gates applied in the linear order, and one or more of the complex-valued amplitudes of the transformed state vector are computationally output.
    Type: Application
    Filed: October 14, 2020
    Publication date: March 3, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Damian Silvio STEIGER, Thomas HAENER, Martin Henri ROETTELER, Helmut Gottfried KATZGRABER
  • Publication number: 20210374307
    Abstract: A method to digitally simulate an evolving quantum state of a qubit register of a quantum computer is enacted in a computer system. The quantum state is represented as an array of complex-valued amplitudes, where each amplitude is associated with an individual qubit of the qubit register, and where the quantum state is separable as a product of the individual quantum states of each qubit. One or more quantum-program instructions corresponding to a quantum circuit are received, and the amplitudes of the array are adjusted to reflect a change in the quantum state pursuant to execution of the quantum circuit, the change preserving the separability of the quantum state as a product of individual quantum states of each qubit. One or more of the adjusted amplitudes are then outputted computationally, in such form as to be receivable as input to a computer program.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas HAENER, Vadym KLIUCHNIKOV, Martin Henri ROETTELER
  • Publication number: 20210224049
    Abstract: This application concerns quantum computing devices. Certain embodiments comprise receiving a high-level description of a quantum program to be implemented in a quantum-computing device, and compiling the high-level description of the quantum program into a lower-level program that is executable by a quantum-computing device, wherein the high-level description of the quantum program to be implemented in a quantum-computing device supports at least one of loops and branches.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Mathias Soeken, Martin Roetteler
  • Publication number: 20210124567
    Abstract: None of the existing quantum programming languages provide specialized support for programming patterns such as conditional-adjoint or adjoint-via-conjugation. As a result, compilers of these languages fail to exploit the optimization opportunities mentioned in this disclosure. Further, none of the available quantum programming languages provide support for automatic translation of circuits using clean qubits to circuits that use idle qubits. Thus, the resulting circuits oftentimes use more qubits than would be required. Embodiments of the disclosed technology, thus allow one to run said circuits on smaller quantum devices. Previous multiplication circuits make use of (expensive) controlled additions. Embodiments of the disclosed technology employ multipliers that work using conditional-adjoint additions, which are cheaper to implement on both near-term and large-scale quantum hardware. The savings lie between 1.5 and 2× in circuit depth for large number of qubits.
    Type: Application
    Filed: March 24, 2020
    Publication date: April 29, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Martin Roetteler
  • Publication number: 20210117844
    Abstract: Embodiments of the disclosed technology concern transforming a high-level quantum-computer program to one or more symbolic expressions. Because the transformations lead to symbolic expressions in the compiled code, one can extract these to arrive at symbolic resource estimates for the quantum program. In cases where these transformations do not yield closed-form solutions, they can still be evaluated many orders of magnitude faster than it was possible using other resource estimation tools. Having access to such symbolic or near-symbolic expressions not only greatly improves the performance of accuracy management and resource estimation, but also better informs quantum software developers of the bottlenecks that may be present in the quantum program. In turn, the underlying quantum-computer program can be improved as appropriate.
    Type: Application
    Filed: April 8, 2020
    Publication date: April 22, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Giulia Meuli, Martin Roetteler
  • Patent number: 10699209
    Abstract: Quantum algorithms to solve practical problems in quantum chemistry, materials science, and matrix inversion often involve a significant amount of arithmetic operations. These arithmetic operations are to be carried out in a way that is amenable to the underlying fault-tolerant gate set, leading to an optimization problem to come close to the Pareto-optimal front between number of qubits and overall circuit size. In this disclosure, a quantum circuit library is provided for floating-point addition and multiplication. Circuits are presented that are automatically generated from classical Verilog implementations using synthesis tools and compared with hand-generated and hand-optimized circuits. Example circuits were constructed and tested using the software tools LIQUi| and RevKit.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 30, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Martin Roetteler, Krysta Svore
  • Patent number: 10664761
    Abstract: Methods for generating quantum computing circuits by distributing approximation errors in a quantum algorithm are described. A method includes decomposing a quantum algorithm into quantum circuits. The method includes using at least one processor, automatically performing a step-wise decomposition of the quantum algorithm until the quantum algorithm is fully decomposed into the quantum circuits, where the automatically performing the step-wise decomposition results in a set of approximation errors and a set of parameters to instantiate at least a subset of the quantum circuits corresponding to the quantum algorithm, such that an overall approximation error caused by the automatically performing the step-wise decomposition is maintained below a specified threshold approximation error.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: May 26, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore, Vadym Kliuchnikov
  • Publication number: 20190362270
    Abstract: Methods for generating quantum computing circuits by distributing approximation errors in a quantum algorithm are described. A method includes decomposing a quantum algorithm into quantum circuits. The method includes using at least one processor, automatically performing a step-wise decomposition of the quantum algorithm until the quantum algorithm is fully decomposed into the quantum circuits, where the automatically performing the step-wise decomposition results in a set of approximation errors and a set of parameters to instantiate at least a subset of the quantum circuits corresponding to the quantum algorithm, such that an overall approximation error caused by the automatically performing the step-wise decomposition is maintained below a specified threshold approximation error.
    Type: Application
    Filed: June 29, 2018
    Publication date: November 28, 2019
    Inventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore, Vadym Kliuchnikov
  • Publication number: 20190361675
    Abstract: Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.
    Type: Application
    Filed: June 29, 2018
    Publication date: November 28, 2019
    Inventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore
  • Patent number: 10423887
    Abstract: Among the embodiments disclosed herein are quantum circuits (and associated compilation techniques) for performing Shor's quantum algorithm to factor n-bit integers. Example embodiments of the circuits use only 2n+2 qubits. In contrast to previous space-optimized implementations, embodiments of the disclosed technology feature a purely Toffoli-based modular multiplication circuit. Certain other example modular multiplication circuits disclosed herein are based on an (in-place) constant-adder that uses dirty ancilla qubits to achieve a size in (n log n) and a depth in (n).
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: September 24, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Martin Roetteler, Krysta Svore, Thomas Haener
  • Publication number: 20190156242
    Abstract: Quantum algorithms to solve practical problems in quantum chemistry, materials science, and matrix inversion often involve a significant amount of arithmetic operations. These arithmetic operations are to be carried out in a way that is amenable to the underlying fault-tolerant gate set, leading to an optimization problem to come close to the Pareto-optimal front between number of qubits and overall circuit size. In this disclosure, a quantum circuit library is provided for floating-point addition and multiplication. Circuits are presented that are automatically generated from classical Verilog implementations using synthesis tools and compared with hand-generated and hand-optimized circuits. Example circuits were constructed and tested using the software tools LIQUi| and RevKit.
    Type: Application
    Filed: June 29, 2018
    Publication date: May 23, 2019
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas Haener, Martin Roetteler, Krysta Svore