Abstract: Approaches for fabricating one-dimensional metallization for solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a back surface and an opposing light-receiving surface. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the back surface of the substrate and parallel along a first direction to form a one-dimensional layout of emitter regions for the solar cell. A conductive contact structure is disposed on the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal lines corresponding to the plurality of alternating N-type and P-type semiconductor regions. The plurality of metal lines is parallel along the first direction to form a one-dimensional layout of a metallization layer for the solar cell.

Abstract: A solar cell can include a conductive foil having a first portion with a first yield strength coupled to a semiconductor region of the solar cell. The solar cell can be interconnected with another solar cell via an interconnect structure that includes a second portion of the conductive foil, with the interconnect structure having a second yield strength greater than the first yield strength.

Abstract: The present invention is a geo-thermal energy system comprised of: at least one extraction pump that draws water from a natural water source; at least one heat exchanger, each of which provides an energy source, from which one or more corresponding buildings can extract heat to provide heating, or into which each building can reject heat to provide cooling; a first length of piping between the water source and the heat exchanger that delivers the water to each heat exchanger; a second length of piping that discharges the water after exiting each heat exchanger; and at least one diversion junction that is coupled to either the first or second length of piping and provides non-potable water to a fire protection system, or other potable water use, within each building. The discharged water is discharged back to the same water source, a second natural water source, a well, or a drainage system without adding any contaminants to the water.

Abstract: A method and apparatus to reduce the amount of required memory and instruction cycles when implementing Fast Fourier Transforms (FFTs) on a computer system is described. The invention optimizes FFT software using in-place bit reversal (IPBR) implemented on a processor capable of bit reversed incrementation. Alternative embodiments implement the invention for out of place bit reversal (OOPBR) and on processors that do not support special instructions for bit reversed incrementation. The invention only generates unique bit-reversed address pairs and avoids generation of self-reversed addresses. To optimize the invention for in place bit reversal, every non-self bit reversed address in the input array is generated only once, while making simple, computationally efficient increments away from the previous pair of bit reversed addresses. The address pair generator can independently advance only one address in each address pair, and bit reversal of one address uniquely defines the other address.

Abstract: Reducing the amount of required memory and instruction cycles when implementing Fast Fourier Transforms (FFTs) on a computer system is described. The invention optimizes FFT software using in-place bit reversal (IPBR) implemented on a processor capable of bit reversed incrementation. Enables the design of address generators that combine IPBR and one FFT stage in parallel. Increases efficiency by removing instructions to store output from a stand-alone IPBR mapping and then fetch the same data as input for the FFT stage.

Abstract: A method and apparatus to reduce the amount of required memory and instruction cycles when implementing Fast Fourier Transformers (FFTs) on a computer system is described. The invention optimizes FFT software using in-place bit reversal (IPBR) implemented on a processor capable of bit reversed incrementation. Alternative embodiments implement the invention for out of place bit reversal (OOPBR) and on processors that do not support special instructions for bit reversed incrementation. The invention only generates unique bit-reversed address pairs and avoids generation of self-reversed addresses. To optimize the invention for in place bit reversal, every non-self bit reversed address in the input array is generated only once, while making simple, computationally efficient increments away from the previous pair of bit reversed addresses. The address pair generator can independently advance only one address in each address pair, and bit reversal of one address uniquely defines the other address.

Abstract: A method and apparatus for cancelling acoustic echoes that enhances the hands free operation of audio/video conferencing equipment, wireless and cellular telephones, internet and intranet telephones, etc. is disclosed. The method and apparatus use a constrained and orthogonalized, frequency domain, block, least mean square adaptive filter to generate an estimate of an acoustic echo signal. The estimate of the acoustic echo signal is subtracted from a near end microphone signal to provide an echo reduced communication signal. The echo reduced communication signal is then either transmitted or processed further. The further processing can include non-linear processing using an adaptive speech filter. The method and apparatus include a novel method for updating the coefficients of an adaptive filter.