Patents by Inventor Thomas Heynemann

Thomas Heynemann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060020850
    Abstract: In an implementation of latent error detection, memory regions that each correspond to a different processor element of a redundant processor system are scanned for latent processing errors maintained as erroneous data. The data maintained in the memory regions is compared to detect a latent processing error in a first memory region. The latent processing error is resolved by copying data from a second memory region into the first memory region where the data maintained in the second memory region is determined to be identical to data maintained in at least a third memory region.
    Type: Application
    Filed: July 20, 2004
    Publication date: January 26, 2006
    Inventors: Robert Jardine, David Bernick, Thomas Heynemann, James Smullen
  • Publication number: 20050246578
    Abstract: A method and system of exchanging information between processors. At least some of the illustrative embodiments may be a method comprising exchanging information between a plurality of processors by writing (by a first processor) a first datum to a logic device and then continuing processing of a user program by the first processor, writing (by a second processor) a second datum to the logic device and then continuing processing of a user program by the second processor, and writing (by the logic device) the first and second datum to each of the first and second processors after all the processors have written their respective datum to the logic device.
    Type: Application
    Filed: January 25, 2005
    Publication date: November 3, 2005
    Inventors: William Bruckert, David Garcia, Thomas Heynemann, James Klecka, Jeffrey Sprouse