Patents by Inventor Thomas Hueske

Thomas Hueske has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240078586
    Abstract: In selected embodiments a recommendation generator builds a network of interrelationships between venues, reviewers and users based on their attributes and reviewer and user reviews of the venues. Each interrelationship or link may be positive or negative and may accumulate with other links (or anti-links) to provide nodal links the strength of which are based on commonality of attributes among the linked nodes and/or common preferences that one node, such as a reviewer, expresses for other nodes, such as venues. The links may be first order (based on a direct relationship between, for instance, a reviewer and a venue) or higher order (based on, for instance, the fact that two venue are both liked by a given reviewer). The recommendation engine in certain embodiments determines recommended venues based on user attributes and venue preferences by aggregating the link matrices and determining the venues which are most strongly coupled to the user.
    Type: Application
    Filed: May 4, 2023
    Publication date: March 7, 2024
    Applicant: NARA LOGICS, INC.
    Inventors: Nathan R. WILSON, Emily A. HUESKE, Thomas C. COPEMAN, Evan Favermann EISERT, Jana B. EGGERS, Raymond J. PLANTE, Michael D. HOULE
  • Patent number: 5293577
    Abstract: Method and apparatus for preventing inadmissible deviations from the runtime protocol of an application in a data exchange system. The data exchange system has, for example, a terminal T and a chip card K. For various applications (for example, automatic teller unit, computer access), basic functions B stored in the chip card K are processed in a sequence respectively defined in a protocol. Since the basic functions B are called in proceeding from the terminal T, the data integrity could be deteriorated by intentional modifications of the protocol sequence at the terminal T. By storing the allowable protocols in a control list STL and establishing a status memory area ZS on the chip card K, it becomes possible to monitor the protocol execution on the chip card K independently of the terminal T. The respective status Z of an application is fixed in the status memory area ZS. All basic function designations Bn permitted for a status Z are deposited in the control list STL.
    Type: Grant
    Filed: July 17, 1991
    Date of Patent: March 8, 1994
    Assignee: Siemens Nixdorf Informationssysteme AG
    Inventors: Thomas Hueske, Hildegard Jost, Klaus Mueller, Axel Pfau