Patents by Inventor Thomas I. Wallow

Thomas I. Wallow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658004
    Abstract: A method for scanning a sample by a charged particle beam tool is provided. The method includes providing the sample having a scanning area including a plurality of unit areas, scanning a unit area of the plurality of unit areas, blanking a next unit area of the plurality of unit areas adjacent to the scanned unit area, and performing the scanning and the blanking the plurality of unit areas until all of the unit areas are scanned.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: May 23, 2023
    Assignee: ASML Netherlands B.V.
    Inventors: Adam Lyons, Thomas I. Wallow
  • Publication number: 20220084784
    Abstract: A method for scanning a sample by a charged particle beam tool is provided. The method includes providing the sample having a scanning area including a plurality of unit areas, scanning a unit area of the plurality of unit areas, blanking a next unit area of the plurality of unit areas adjacent to the scanned unit area, and performing the scanning and the blanking the plurality of unit areas until all of the unit areas are scanned.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 17, 2022
    Inventors: Adam LYONS, Thomas I. WALLOW
  • Patent number: 11127563
    Abstract: A method for scanning a sample by a charged particle beam tool is provided. The method includes providing the sample having a scanning area including a plurality of unit areas, scanning a unit area of the plurality of unit areas, blanking a next unit area of the plurality of unit areas adjacent to the scanned unit area, and performing the scanning and the blanking the plurality of unit areas until all of the unit areas are scanned.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: September 21, 2021
    Assignee: ASML Netherlands B.V.
    Inventors: Adam Lyons, Thomas I. Wallow
  • Patent number: 10754256
    Abstract: A method including providing a plurality of unit cells for a plurality of gauge patterns appearing in one or more images of one or more patterning process substrates, each unit cell representing an instance of a gauge pattern of the plurality of gauge patterns, averaging together image information of each unit cell to arrive at a synthesized representation of the gauge pattern, and determining a geometric dimension of the gauge pattern based on the synthesized representation.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: August 25, 2020
    Assignee: ASML Netherlands B.V.
    Inventors: Thomas I. Wallow, Peng-cheng Yang, Adam Lyons, Mir Farrokh Shayegan Salek, Hermanus Adrianus Dillen
  • Publication number: 20200211820
    Abstract: A method for scanning a sample by a charged particle beam tool is provided. The method includes providing the sample having a scanning area including a plurality of unit areas, scanning a unit area of the plurality of unit areas, blanking a next unit area of the plurality of unit areas adjacent to the scanned unit area, and performing the scanning and the blanking the plurality of unit areas until all of the unit areas are scanned.
    Type: Application
    Filed: December 30, 2019
    Publication date: July 2, 2020
    Inventors: Adam LYONS, Thomas I. WALLOW
  • Patent number: 10663870
    Abstract: A method including obtaining a plurality of gauges of a plurality of gauge patterns for a patterning process, each gauge pattern configured for measurement of a parameter of the patterning process when created as part of the patterning process, and creating a selection of one or more gauges from the plurality of gauges, wherein a gauge is included in the selection provided the gauge and all the other gauges, if any, of the same gauge pattern, or all of the one or more gauges of the same gauge pattern linked to the gauge, pass a gauge printability check.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: May 26, 2020
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Jun Chen, Thomas I. Wallow, Bart Laenens, Yi-Hsing Peng
  • Patent number: 10627722
    Abstract: Provided is a process including: obtaining a layout specifying, at least in part, a pattern to be transferred to a substrate via a patterning process and an etch process; and modifying, with one or more processors, the layout to include an etch-assist feature that is larger than a resolution limit of the patterning process and smaller than a resolution limit of the etch process, the etch-assist feature being configured to reduce a bias of the patterning process or the etch process, to reduce an etch induced shift of a feature in the layout due to the etch process, or to expand a process window of another patterning process.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: April 21, 2020
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Wim Tjibbo Tel, Thomas I. Wallow
  • Patent number: 10417359
    Abstract: A process of calibrating a model, the process including: obtaining training data including: scattered radiation information from a plurality of structures, individual portions of the scattered radiation information being associated with respective process conditions being characteristics of a patterning process of the individual structures; and calibrating a model with the training data by determining a ratio relating a change in one of the process characteristics to a corresponding change in scattered radiation information.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: September 17, 2019
    Assignee: ASML Netherlands B.V.
    Inventors: Robert John Socha, Thomas I. Wallow
  • Publication number: 20190018313
    Abstract: Provided is a process including: obtaining a layout specifying, at least in part, a pattern to be transferred to a substrate via a patterning process and an etch process; and modifying, with one or more processors, the layout to include an etch-assist feature that is larger than a resolution limit of the patterning process and smaller than a resolution limit of the etch process, the etch-assist feature being configured to reduce a bias of the patterning process or the etch process, to reduce an etch induced shift of a feature in the layout due to the etch process, or to expand a process window of another patterning process.
    Type: Application
    Filed: December 21, 2016
    Publication date: January 17, 2019
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Wim Tjibbo TEL, Thomas I. WALLOW
  • Publication number: 20180364589
    Abstract: A method including obtaining a plurality of gauges of a plurality of gauge patterns for a patterning process, each gauge pattern configured for measurement of a parameter of the patterning process when created as part of the patterning process, and creating a selection of one or more gauges from the plurality of gauges, wherein a gauge is included in the selection provided the gauge and all the other gauges, if any, of the same gauge pattern, or all of the one or more gauges of the same gauge pattern linked to the gauge, pass a gauge printability check.
    Type: Application
    Filed: November 30, 2016
    Publication date: December 20, 2018
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Jun CHEN, Thomas I. WALLOW, Bart LANENS, Yi-Hsing PENG
  • Publication number: 20180275521
    Abstract: A method including providing a plurality of unit cells for a plurality of gauge patterns appearing in one or more images of one or more patterning process substrates, each unit cell representing an instance of a gauge pattern of the plurality of gauge patterns, averaging together image information of each unit cell to arrive at a synthesized representation of the gauge pattern, and determining a geometric dimension of the gauge pattern based on the synthesized representation.
    Type: Application
    Filed: October 3, 2016
    Publication date: September 27, 2018
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Thomas I. WALLOW, Peng-cheng YANG, Adam LYONS, Mir Farrokh SHAYEGAN SALEK, Hermanus Adrianus DILLEN
  • Publication number: 20170177760
    Abstract: A process of calibrating a model, the process including: obtaining training data including: scattered radiation information from a plurality of structures, individual portions of the scattered radiation information being associated with respective process conditions being characteristics of a patterning process of the individual structures; and calibrating a model with the training data by determining a ratio relating a change in one of the process characteristics to a corresponding change in scattered radiation information.
    Type: Application
    Filed: December 14, 2016
    Publication date: June 22, 2017
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Robert John SOCHA, Thomas I. WALLOW
  • Patent number: 8889343
    Abstract: Approaches for utilizing laser annealing to optimize lithographic processes such as directed self assembly (DSA) are provided. Under a typical approach, a substrate (e.g., a wafer) will be subjected to a lithographic process (e.g., having a set of stages/phases, aspects, etc.) such as DSA. Before or during such process, a set of laser annealing passes/scans will be made over the substrate to optimize one or more of the stages. In addition, the substrate could be subjected to additional processes such as hotplate annealing, etc. Still yet, in making a series of laser annealing passes, the techniques utilized and/or beam characteristics of each pass could be varied to further optimize the results.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: November 18, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Moshe E Preil, Gerard M. Schmid, Richard A. Farrell, Ji Xu, Thomas I. Wallow
  • Publication number: 20140178824
    Abstract: Approaches for utilizing laser annealing to optimize lithographic processes such as directed self assembly (DSA) are provided. Under a typical approach, a substrate (e.g., a wafer) will be subjected to a lithographic process (e.g., having a set of stages/phases, aspects, etc.) such as DSA. Before or during such process, a set of laser annealing passes/scans will be made over the substrate to optimize one or more of the stages. In addition, the substrate could be subjected to additional processes such as hotplate annealing, etc. Still yet, in making a series of laser annealing passes, the techniques utilized and/or beam characteristics of each pass could be varied to further optimize the results.
    Type: Application
    Filed: December 26, 2012
    Publication date: June 26, 2014
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Moshe E Preil, Gerard M. Schmid, Richard A. Farrell, Ji Xu, Thomas I. Wallow
  • Patent number: 8642474
    Abstract: Ultrafine dimensions are accurately and efficiently formed in a target layer using a spacer lithographic technique comprising forming a first mask pattern, forming a cross-linkable layer over the first mask pattern, forming a cross-linked spacer between the first mask pattern and cross-linkable layer, removing the cross-linkable layer, cross-linked spacer from the upper surface of the first mask pattern and the first mask pattern to form a second mask pattern comprising remaining portions of the cross-linked spacer, and etching using the second mask pattern to form an ultrafine pattern in the underlying target layer.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: February 4, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ryoung-han Kim, Yunfei Deng, Thomas I. Wallow, Bruno La Fontaine
  • Patent number: 8153351
    Abstract: Photolithography methods using BARCs having graded optical properties are provided. In an exemplary embodiment, a photolithography method comprises the steps of depositing a BARC overlying a material to be patterned, the BARC having a refractive index and an absorbance. The BARC is modified such that, after the step of modifying, values of the refractive index and the absorbance are graded from first values at a first surface of the BARC to second values at a second surface of the BARC. The step of modifying is performed after the step of depositing.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: April 10, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Thomas I. Wallow, Jongwook Kye
  • Patent number: 7851136
    Abstract: An integrated circuit fabrication process as described herein employs a photoresist stabilization step where patterned photoresist material is exposed to radiation having a wavelength that promotes cross-linking in the shallow surfaces of the patterned photoresist features. The patterned photoresist material is highly absorptive of the stabilizing radiation, which results in the surface cross-linking and modification of the outer surfaces of the patterned photoresist material. This modified “shell” is immune to photoresist developer, photoresist solvents, intense ion implantation, and intense etchants. The shell also enables for the resist not to deform when baked at a temperature above its glass transition temperature. For example, the photoresist stabilization technique can be used in a double exposure process such that a patterned photoresist layer remains intact during a subsequent lithographic sub-process.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: December 14, 2010
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Harry J. Levinson, Ryoung-han Kim, Thomas I. Wallow
  • Patent number: 7718529
    Abstract: Ultrafine dimensions, smaller than conventional lithographic capabilities, are formed employing an efficient inverse spacer technique comprising selectively removing spacers. Embodiments include forming a first mask pattern over a target layer, forming a spacer layer on the upper and side surfaces of the first mask pattern leaving intermediate spaces, depositing a material in the intermediate spacers leaving the spacer layer exposed, selectively removing the spacer layer to form a second mask pattern having openings exposing the target layer, and etching the target layer through the second mask pattern.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: May 18, 2010
    Assignee: GlobalFoundries Inc.
    Inventors: Yunfei Deng, Ryoung-han Kim, Thomas I. Wallow
  • Publication number: 20100099045
    Abstract: Photolithography methods using BARCs having graded optical properties are provided. In an exemplary embodiment, a photolithography method comprises the steps of depositing a BARC overlying a material to be patterned, the BARC having a refractive index and an absorbance. The BARC is modified such that, after the step of modifying, values of the refractive index and the absorbance are graded from first values at a first surface of the BARC to second values at a second surface of the BARC. The step of modifying is performed after the step of depositing.
    Type: Application
    Filed: October 21, 2008
    Publication date: April 22, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Thomas I. WALLOW, Jongwook KYE
  • Publication number: 20090023298
    Abstract: Ultrafine dimensions, smaller than conventional lithographic capabilities, are formed employing an efficient inverse spacer technique comprising selectively removing spacers. Embodiments include forming a first mask pattern over a target layer, forming a spacer layer on the upper and side surfaces of the first mask pattern leaving intermediate spaces, depositing a material in the intermediate spacers leaving the spacer layer exposed, selectively removing the spacer layer to form a second mask pattern having openings exposing the target layer, and etching the target layer through the second mask pattern.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 22, 2009
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Yunfei Deng, Ryoung-han Kim, Thomas I. Wallow