Patents by Inventor Thomas J. Barnes
Thomas J. Barnes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10437985Abstract: A method, apparatus, and computer-readable medium are provided to determine whether to enroll a computing device as a provider of a secure application enclave for an application. The following information is obtained from a second computing device: a device identifier for a first computing device, application information, and data for a shared secret. The first computing device is configured to provide a secure application enclave to support execution of the application associated with the application information, and the shared secret is shared between the secure application enclave and a user of the first computing device. A determination is made whether to enroll the first computing device as a provider of the secure application enclave for the application using the device identifier, the application information, and the data for the shared secret. The secure application enclave may be notified whether the enrollment of the first computing device is successful.Type: GrantFiled: October 1, 2016Date of Patent: October 8, 2019Assignee: Intel CorporationInventors: Jonathan Trostle, Paritosh Saxena, Ernie Brickell, Thomas J. Barnes
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Publication number: 20180096137Abstract: A method, apparatus, and computer-readable medium are provided to determine whether to enroll a computing device as a provider of a secure application enclave for a secure an application. The following information is obtained from a second computing device: a device identifier for a first computing device, application information, and data for a shared secret. The first computing device is configured to provide a secure application enclave to support execution of a secure the application associated with the application information, and the shared secret is shared between the secure application enclave and a user of the first computing device. A determination is made whether to enroll the first computing device as a provider of the secure application enclave for the secure application using the device identifier, the application information, and the data for the shared secret. The secure application enclave may be notified whether the enrollment of the first computing device is successful.Type: ApplicationFiled: October 1, 2016Publication date: April 5, 2018Inventors: Jonathan Trostle, Paritosh Saxena, Ernie Brickell, Thomas J. Barnes
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Publication number: 20160274806Abstract: According to one configuration, upon receiving data, a respective node in a distributed storage system produces metadata based on the received data. The generated metadata indicates whether or not to bypass storage of the received data in the cache storage resource and store the received data in the non-cache storage resource of the repository. Data storage control logic uses the metadata to control how the received data is stored. A state of the metadata can indicate to prevent storage of the received data in a corresponding cache resource associated with the respective storage node. Thus, the generated metadata can provide guidance to corresponding data storage control logic whether to store the received data in a cache storage resource or non-cache storage resource.Type: ApplicationFiled: December 11, 2013Publication date: September 22, 2016Inventor: Thomas J. BARNES
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Patent number: 9317212Abstract: A mass storage device such as a disk drive or SSD (solid state drive) employs optimization logic for reduced power consumption in a host personal electronic device that identifies and prioritizes performance and power trade-offs by considering user expectations, user presence and application responsiveness. The storage device receives commands and information from the host device indicative of user expectations about application invocation, data freshness, and usage patterns, and determines a operational state indicative of behavior settings for reducing power consumption while maintaining the performance constraints required by the user expectations. The granularity of performance considerations communicated from the host device to the mass storage device is expanded to permit the storage device to determine, based on performance constraints from user expectations, appropriate and specific power reduction measures for maintaining the user experience.Type: GrantFiled: December 18, 2012Date of Patent: April 19, 2016Assignee: Intel CorporationInventors: Amber D. Huffman, Knut S. Grimsrud, Thomas J. Barnes
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Publication number: 20140173242Abstract: A mass storage device such as a disk drive or SSD (solid state drive) employs optimization logic for reduced power consumption in a host personal electronic device that identifies and prioritizes performance and power trade-offs by considering user expectations, user presence and application responsiveness. The storage device receives commands and information from the host device indicative of user expectations about application invocation, data freshness, and usage patterns, and determines a operational state indicative of behavior settings for reducing power consumption while maintaining the performance constraints required by the user expectations. The granularity of performance considerations communicated from the host device to the mass storage device is expanded to permit the storage device to determine, based on performance constraints from user expectations, appropriate and specific power reduction measures for maintaining the user experience.Type: ApplicationFiled: December 18, 2012Publication date: June 19, 2014Inventors: Amber D. Huffman, Knut S. Grimsrud, Thomas J. Barnes
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Patent number: 8171219Abstract: A method and system to perform caching based at least on one or more file-level heuristics. The caching of a storage medium in a caching device is performed by a cache policy engine. The cache policy engine receives file-level information of input/output access of data of the storage medium and caches or evicts the data of the storage medium in the caching device based on the received file-level information. By utilizing information about the files and file operations associated with the disk sectors or logical block addresses of the storage medium, the cache policy engine can make a better decision on the data selection of the storage medium to be cached in or evicted from the caching device in one embodiment of the invention. Higher cache hit rates can be achieved and the performance of the system utilizing the cache policy engine is improved.Type: GrantFiled: March 31, 2009Date of Patent: May 1, 2012Assignee: Intel CorporationInventors: Sanjeev N. Trika, Amber D. Huffman, James A. Boyd, Frank T. Hady, Glenn J. Hinton, Dale J. Juenemann, Oscar P. Pinto, Scott R. Tetrick, Thomas J. Barnes, Scott E. Burridge
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Patent number: 7986217Abstract: In a radio frequency identification (RFID) system that requires an RFID reader to receive a response from an RFID tag and then transmit a command to the RFID tag within a certain time period, the RFID reader may place an initial part of the command transmission in the RFID reader's transmit chain before receiving the entire response from the RFID tag, and complete the command transmission after receiving the entire response.Type: GrantFiled: September 27, 2007Date of Patent: July 26, 2011Assignee: Intel CorporationInventors: Thomas J. Barnes, Marc A. Loyer
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Publication number: 20100250834Abstract: A method and system to perform caching based at least on one or more file-level heuristics. The caching of a storage medium in a caching device is performed by a cache policy engine. The cache policy engine receives file-level information of input/output access of data of the storage medium and caches or evicts the data of the storage medium in the caching device based on the received file-level information. By utilizing information about the files and file operations associated with the disk sectors or logical block addresses of the storage medium, the cache policy engine can make a better decision on the data selection of the storage medium to be cached in or evicted from the caching device in one embodiment of the invention. Higher cache hit rates can be achieved and the performance of the system utilizing the cache policy engine is improved.Type: ApplicationFiled: March 31, 2009Publication date: September 30, 2010Inventors: Sanjeev N. Trika, Amber D. Huffman, James A. Boyd, Frank T. Hady, Glenn J. Hinton, Dale J. Juenemann, Oscar P. Pinto, Scott R. Tetrick, Thomas J. Barnes, Scott E. Burridge
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Patent number: 7693493Abstract: Mechanisms for reducing amplitude-modulated noise in a wireless transceiver are generally described. In one example, an apparatus includes a radio-frequency identification (RFID) transceiver, a digital-analog converter (DAC) coupled with the transceiver, a reconstruction filter coupled with the digital-analog converter, and hold logic associated with the reconstruction filter to enable the reconstruction filter to hold its output voltage.Type: GrantFiled: June 29, 2007Date of Patent: April 6, 2010Assignee: Intel CorporationInventors: Scott Chiu, Marc Loyer, Thomas J Barnes, Rapp Jan, Jimmy Carlsson
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Publication number: 20090085748Abstract: In a radio frequency identification (RFID) system that requires an RFID reader to receive a response from an RFID tag and then transmit a command to the RFID tag within a certain time period, the RFID reader may place an initial part of the command transmission in the RFID reader's transmit chain before receiving the entire response from the RFID tag, and complete the command transmission after receiving the entire response.Type: ApplicationFiled: September 27, 2007Publication date: April 2, 2009Inventors: THOMAS J. BARNES, Marc A. Loyer
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Publication number: 20090003487Abstract: Mechanisms for reducing amplitude-modulated noise in a wireless transceiver are generally described. In one example, an apparatus includes a radio-frequency identification (RFID) transceiver, a digital-analog converter (DAC) coupled with the transceiver, a reconstruction filter coupled with the digital-analog converter, and hold logic associated with the reconstruction filter to enable the reconstruction filter to hold its output voltage.Type: ApplicationFiled: June 29, 2007Publication date: January 1, 2009Inventors: Scott Chiu, Marc Loyer, Thomas J. Barnes, Jan Rapp, Jimmy Carlsson
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Patent number: 7046795Abstract: Briefly, in accordance with one embodiment of the invention, a method for actively characterizing the latency of an audio channel of a computer, such as a personal computer, is provided. At least two signal streams for a waveform are created in the audio channel. The presence of the first signal sample stream for the waveform and the second signal sample stream for the waveform is detected at a point in the audio channel. The time between the detections of the signal sample streams is measured. Briefly, in accordance with another embodiment of the invention, a method of actively characterizing the latency of an audio channel of a computer, such as a personal computer, is provided. At least a first and a second waveform are created in the audio channel. The presence of the first and the second waveform are detected at a point in the audio channel. The time between the detections of the waveforms is measured.Type: GrantFiled: December 20, 2000Date of Patent: May 16, 2006Assignee: Intel CorporationInventors: David L. Graumann, Thomas J. Barnes, John J. Bielaszewski
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Publication number: 20030215096Abstract: Briefly, in accordance with one embodiment of the invention, a method for actively characterizing the latency of an audio channel of a computer, such as a personal computer, is provided. At least two signal streams for a waveform are created in the audio channel. The presence of the first signal sample stream for the waveform and the second signal sample stream for the waveform is detected at a point in the audio channel. The time between the detections of the signal sample streams is measured.Type: ApplicationFiled: March 3, 2003Publication date: November 20, 2003Inventors: David L. Graumann, Thomas J. Barnes, John J. Bielaszewski
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Publication number: 20010016783Abstract: Briefly, in accordance with one embodiment of the invention, a method for actively characterizing the latency of an audio channel of a computer, such as a personal computer, is provided. At least two signal streams for a waveform are created in the audio channel. The presence of the first signal sample stream for the waveform and the second signal sample stream for the waveform is detected at a point in the audio channel. The time between the detections of the signal sample streams is measured.Type: ApplicationFiled: December 20, 2000Publication date: August 23, 2001Inventors: David L. Graumann, Thomas J. Barnes, John J. Bielaszewski
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Patent number: 5892975Abstract: A method and apparatus for displaying images and/or reproducing sound on a PC card. According to one aspect of the invention, a PC card is disclosed that includes an interface to a data processing device to obtain data representing a set of one or more images from the data processing device. The PC card further includes a memory to store the data, and a display to display the set of images. According to another aspect of the invention, the data may represent sound data, which could be processed by circuitry included in the PC card to reproduce sound. According to yet another aspect of the invention, a method for displaying images on a PC card is provided, by storing a first set of data representing a set of one or more images to a storage area of the PC card, and displaying the set of one or more images on a display of the PC card. According to another aspect of the invention, a method is provided for transferring sound data to the PC card for sound reproduction by the PC card.Type: GrantFiled: March 3, 1997Date of Patent: April 6, 1999Assignee: Intel CorporationInventor: Thomas J. Barnes
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Patent number: 5793803Abstract: A system for detecting an underrun condition in a block processing modem and upon detection retransmitting previously transmitted data or a fixed pattern of data. The system has a register or memory location that counts the symbols in a buffer located between the microprocessor and the DSP. As a symbol is added to the buffer by the microprocessor, the register is incremented. As a block of symbols is taken from the buffer by the DSP, the register decremented. Thus at any point in time, the register contains a count of the symbols in the buffer. When The DSP is ready for a next block of symbols, logic in the DSP compares the symbol count in the register and if the count is too low for the block of symbols to be passed to the DSP, the DSP itself sends either the previous set of data or a fixed pattern of data to the AFE. The error detection software operating in the software layer above the data pump detects an error and requests a retransmission.Type: GrantFiled: September 28, 1995Date of Patent: August 11, 1998Assignee: Intel CorporationInventor: Thomas J. Barnes
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Patent number: 4463654Abstract: An assault rifle is converted from an original to a modified configuration having a remote trigger located forwardly of the magazine by mounting a remote forward trigger to the original rifle by means of a pair of shroud pieces which cradle the rifle's receiver, replacing the original removable trigger of the assault rifle with a replacement lever, providing a cam element movable within cam guides defined in the shroud pieces and connecting the cam element to the remote forward trigger so as to move the cam into engagement with the replacement lever upon actuation of the remote forward trigger. The parts required for conversion are readily detachable from the rifle to thereby return the weapon to its original configuration.Type: GrantFiled: April 29, 1982Date of Patent: August 7, 1984Assignee: Armament Research Corporation of AmericaInventors: Thomas J. Barnes, William H. Parry