Patents by Inventor Thomas J. Haigh, Jr.

Thomas J. Haigh, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11791398
    Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: October 17, 2023
    Assignee: International Business Machines Corporation
    Inventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, Jr., Eric Miller, Son Nguyen
  • Patent number: 11756786
    Abstract: A method of fabricating a dielectric film includes depositing a first precursor on a substrate. The first precursor includes a cyclic carbosiloxane group comprising a six-membered ring. The method also includes depositing a second precursor on the substrate. The first precursor and the second precursor form a preliminary film on the substrate, and the second precursor includes silicon, carbon, and hydrogen. The method further includes exposing the preliminary film to energy from an energy source to form a porous dielectric film.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: September 12, 2023
    Assignee: International Business Machines Corporation
    Inventors: Benjamin D. Briggs, Donald F. Canaperi, Huy Cao, Thomas J. Haigh, Jr., Son Nguyen, Hosadurga Shobha, Devika Sil, Han You
  • Publication number: 20210151579
    Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.
    Type: Application
    Filed: December 29, 2020
    Publication date: May 20, 2021
    Inventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, JR., Eric Miller, Son Nguyen
  • Patent number: 10937892
    Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: March 2, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, Jr., Eric Miller, Son Nguyen
  • Publication number: 20200234949
    Abstract: A method of fabricating a dielectric film includes depositing a first precursor on a substrate. The first precursor includes a cyclic carbosiloxane group comprising a six-membered ring. The method also includes depositing a second precursor on the substrate. The first precursor and the second precursor form a preliminary film on the substrate, and the second precursor includes silicon, carbon, and hydrogen. The method further includes exposing the preliminary film to energy from an energy source to form a porous dielectric film.
    Type: Application
    Filed: January 18, 2019
    Publication date: July 23, 2020
    Inventors: Benjamin D. Briggs, Donald F. Canaperi, Huy Cao, Thomas J. Haigh, JR., Son Nguyen, Hosadurga Shobha, Devika Sil, Han You
  • Publication number: 20200083345
    Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Inventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, JR., ERIC MILLER, SON NGUYEN
  • Publication number: 20190172704
    Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.
    Type: Application
    Filed: January 17, 2019
    Publication date: June 6, 2019
    Inventors: Thomas J. Haigh, JR., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 10242865
    Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: March 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas J. Haigh, Jr., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 10236176
    Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: March 19, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas J. Haigh, Jr., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Publication number: 20170263449
    Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.
    Type: Application
    Filed: March 24, 2017
    Publication date: September 14, 2017
    Inventors: Thomas J. Haigh, JR., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Publication number: 20170263451
    Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.
    Type: Application
    Filed: March 24, 2017
    Publication date: September 14, 2017
    Inventors: Thomas J. Haigh, JR., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 9735005
    Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: August 15, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas J. Haigh, Jr., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 9502288
    Abstract: An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: November 22, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Son Van Nguyen, Alfred Grill, Thomas J. Haigh, Jr., Hosadurga Shobha, Tuan A. Vo
  • Patent number: 9105642
    Abstract: A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: August 11, 2015
    Assignee: International Business Machines Corporation
    Inventors: Griselda Bonilla, Alfred Grill, Thomas J. Haigh, Jr., Satyanarayana V. Nitta, Son Nguyen
  • Patent number: 9018767
    Abstract: A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Griselda Bonilla, Alfred Grill, Thomas J. Haigh, Jr., Satyanarayana V. Nitta, Son Nguyen
  • Publication number: 20140284815
    Abstract: A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity.
    Type: Application
    Filed: May 23, 2014
    Publication date: September 25, 2014
    Applicant: International Business Machines Corporation
    Inventors: Griselda Bonilla, Alfred Grill, Thomas J. Haigh, JR., Satyanarayana V. Nitta, Son Nguyen
  • Publication number: 20140256154
    Abstract: A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity.
    Type: Application
    Filed: May 23, 2014
    Publication date: September 11, 2014
    Applicant: International Business Machines Corporation
    Inventors: Griselda Bonilla, Alfred Grill, Thomas J. Haigh, JR., Satyanarayana V. Nitta, Son Nguyen
  • Patent number: 8779600
    Abstract: A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: July 15, 2014
    Assignee: International Business Machines Corporation
    Inventors: Son Van Nguyen, Griselda Bonilla, Alfred Grill, Thomas J. Haigh, Jr., Satyanarayana V. Nitta
  • Patent number: 8652950
    Abstract: A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: February 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Son Van Nguyen, Alfred Grill, Thomas J. Haigh, Jr., Sanjay Mehta
  • Publication number: 20130333923
    Abstract: A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided.
    Type: Application
    Filed: June 13, 2012
    Publication date: December 19, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mihaela Balseanu, Stephan A. Cohen, Alfred Grill, Thomas J. Haigh, JR., Son V. Nguyen, Mei-Yee Shek, Hosadurga Shobha, Li-Qun Xia