Abstract: This invention is directed to a memory card assembly having a first end connected to a host device and a second end connected to a retractable antenna assembly. The memory card assembly includes a radio for two way communications between the host device and a remote location. The antenna assembly comprises a housing for two antennas and two light emitting diodes (LEDs) that indicate the status of the radio. The two antennas and the two LEDs are connected to the memory card circuit board through two dual function connectors that concurrently pass analog and digital signals.

Abstract: This invention is directed to a PCMCIA Type II memory card holder assembly for a spread spectrum radio communication card that provides radio frequency interference shielding, electrostatic discharge resistance and heat dissipation. The card holder assembly consists of a multilayer circuit board and a card holder. The multilayer circuit board has a ground plane disposed between a plurality of analog circuit layers and a plurality of digital circuit layers. The ground plane is connected by through vias to ground traces on the surfaces of the circuit board. The card holder consists of a card holder frame in which the memory card is slidably and rotatably mounted so that the ground traces continuously contact the frame, and two outer cover plates which are adhered to the opposing surfaces of the card holder frame.

Abstract: This invention is directed to a PCMCIA Type II memory card holder assembly for a spread spectrum radio communication card that provides radio frequency interference shielding, electrostatic discharge resistance and heat dissipation. The card holder assembly consists of a multilayer circuit board and a card holder. The multilayer circuit board has a ground plane disposed between a plurality of analog circuit layers and a plurality of digital circuit layers. The ground plane is connected by through vias to ground traces on the surfaces of the circuit board. The card holder consists of a card holder frame in which the memory card is slidably and rotatably mounted so that the ground traces continuously contact the frame, and two outer cover plates which are adhered to the opposing surfaces of the card holder frame.

Abstract: A radio transceiver for use in data communications uses a single phase-locked loop to control the frequency of the receiver portion while simultaneously providing coarse control of the frequency of the transmitter portion. The output of the receiver portion is also used to provide an error signal for fine tuning the transmitter frequency after the component of the error signal caused by modulation of the transmitter portion has been removed.

Abstract: The invention is directed to a remote equipment control system having a low duty cycle communications link between a remote command transmitter and a remote receiver. The remote receiver is controllingly coupled to the equipment. The remote command transmitter includes a means to transmit a message signal of set time duration at a preselected message separation interval. The message signal has a unique address portion and a command portion.The remote receiver includes a decoding unit and a timing circuit. The decoding unit is responsive to the unique address portion of a received message to provide an enabling signal to be delivered to the timing circuit. The timing circuit upon receipt of the enabling signal provides an output to the decoding unit to prevent entry of any message signal to the decoder for a time duration matching the preselected message separation interval and allowing entry of a message signal for a time duration matching the time duration of the message signal.

Abstract: This disclosure relates to an inductively powered type of electronic transponder for identifying a moving object passing an interrogation area. The transponder includes a tuned inductive-capacitive pick-up circuit for receiving interrogating signals. The picked up interrogating signals are rectified to produce d.c. operating power and are applied to a frequency divider for producing a frequency related transmission signal and clock data rate pulse. A latching circuit enables a shift register so that the clock pulses serially shift out binary encoded data from the shift register. The encoded data is fed to a logic network which is coupled to a balanced switching amplifier for phase modulating the transmission signal for propagation into the interrogation area.