Patents by Inventor Thomas J. Licata

Thomas J. Licata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6730605
    Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: May 4, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Chantal Arena-Foster, Robert F. Foster, Joseph T. Hillman, Thomas J. Licata, Tugrul Yasar
  • Patent number: 6508919
    Abstract: A method of forming diffusion barrier stacks on a dielectric for a dual damascene metal chip-level interconnect, and a diffusion barrier stack produced thereby. Alternating layers of a metal and an electrically resistive diffusion barrier are deposited on a dielectric substrate, with different layers having different thicknesses appropriate to their functions in the device. In an example of the present invention, alternating layers of tantalum and tantalum nitride are deposited on a dielectric substrate.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: January 21, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Thomas J. Licata, Joseph T. Hillman
  • Publication number: 20020148720
    Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.
    Type: Application
    Filed: April 12, 2001
    Publication date: October 17, 2002
    Applicant: Tokyo Electron Limited
    Inventors: Chantal Arena-Foster, Robert F. Foster, Joseph T. Hillman, Thomas J. Licata, Tugrul Yasar
  • Patent number: 6395095
    Abstract: A processing system for processing a substrate comprises a process chamber having a top, a bottom, and a sidewall for defining a process space therein. The process chamber has an opening in the sidewall thereof for providing access to the process space. A plasma-generating assembly is coupled with the process chamber for creating a plasma within the process space. A substrate support assembly is configured for coupling with the process chamber to support a substrate within the process space. The substrate support assembly extends into the process space through the sidewall opening in the process chamber and seals the sidewall opening to generally isolate the process space from atmosphere.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: May 28, 2002
    Assignee: Tokyo Electron Limited
    Inventors: William D. Jones, Robert C. Rowan, Edward L. Sill, Thomas J. Licata
  • Patent number: 6224724
    Abstract: An apparatus and method for compensating the process-related asymmetries produced in physical vapor processing of a surface. The apparatus and method may be used on either a substrate when sputtering material from a source or when using an ionized physical vapor deposition (IPVD) apparatus to either deposit a film onto or remove material from a substrate. A compensating magnet is configured and positioned to produce a compensating magnetic field. The compensating magnetic is positioned to offset the effects of chamber and process-related asymmetries, particularly those that affect the distribution of plasma processing on a substrate where the plasma has been otherwise symmetrically produced. Assymetries about an axis of the substrate, for example, are corrected, in, for example, systems such as sputter coating machines where a rotating magnet cathode or other such technique produces an initially symmetrical plasma.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: May 1, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Thomas J. Licata, Steven D. Hurwitt
  • Patent number: 6200894
    Abstract: A method of enhancing the aluminum interconnect properties in very fine metalization patterns interconnecting integrated circuits that improves the texture and electromigration resistance of aluminum in thin films. Enhanced performance can be obtained by forming a smooth oxide layer in situ, or by surface conditioning a previously formed oxide layer in an appropriate manner to provide the requisite surface smoothness, then by refining the aluminum microstructure by hot deposition or ex-situ heat treatment.
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: March 13, 2001
    Assignees: International Business Machines Corporation, Kabushiki Kaisha Toshiba
    Inventors: Thomas J. Licata, Katsuya Okumura, Kenneth P. Rodbell
  • Patent number: 6197165
    Abstract: Ionized physical vapor deposition (IPVD) is provided by a method of apparatus for sputtering coating material from a compound sputtering source formed of an annular ring-shaped target with a circular target at its center, increasing deposition rate and coating uniformity. Each target is separately energized to facilitate control of the distribution of material sputtered into the chamber and the uniformity of the deposited film. The sputtered material from the targets is ionized in a processing space between the target and a substrate by generating a dense plasma in the space with energy coupled from a coil located outside of the vacuum chamber behind an annular dielectric window in the chamber wall in the central opening of the annular target and surrounding the circular target. A Faraday type shield physically shields the window to prevent coating material from coating the window, while allowing the inductive coupling of energy from the coil into the processing space.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: March 6, 2001
    Assignee: Tokyo Electron Limited
    Inventors: John S. Drewery, Thomas J. Licata
  • Patent number: 6132564
    Abstract: A method is provided of cleaning device surfaces for the metallization thereof by treating the surfaces in a chamber equipped for ionized physical vapor deposition or other plasma-based metal deposition process. The surfaces are plasma etched, preferably in a chamber in which the next metal layer is to be deposited onto the surfaces. Also or in the alternative, the surfaces are plasma etched with a plasma containing ions of the metal to be deposited. Preferably also, the etching process is followed by depositing a film of the metal, preferably by ionized physical vapor deposition, in the chamber. The metal may, for example, be titanium that is sputtered from a target within the chamber. The process of depositing the metal, where the metal is titanium, may, for example, be followed by the deposition of a titanium nitride layer.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: October 17, 2000
    Assignee: Tokyo Electron Limited
    Inventor: Thomas J. Licata
  • Patent number: 6117279
    Abstract: An ionized physical vapor deposition method and apparatus are provided which employs a magnetron magnetic field produced by cathode magnet structure behind a sputtering target to produce a main sputtering plasma, and an RF inductively coupled field produced by an RF coil outside of and surrounding the vacuum of the chamber to produce a secondary plasma in the chamber between the target and a substrate to ionize sputtered material passing from the target to the substrate so that the sputtered material can be electrically or magnetically steered to arrive at the substrate at right angles. A circumferentially interrupted shield or shield structure in the chamber protects the window from material deposits. A low pass LC filter circuit allows the shield to float relative to the RF voltage but to dissipate DC potential on the shield.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: September 12, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Jason Smolanoff, Doug Caldwell, Jim Zibrida, Bruce Gittleman, Thomas J. Licata
  • Patent number: 6080287
    Abstract: Ionized physical vapor deposition (IPVD) is provided by a method of apparatus for sputtering conductive metal coating material from an annular magnetron sputtering target. The sputtered material is ionized in a processing space between the target and a substrate by generating a dense plasma in the space with energy coupled from a coil located outside of the vacuum chamber behind a dielectric window in the chamber wall at the center of the opening in the sputtering target. Faraday type shields physically shield the window to prevent coating material from coating the window, while allowing the inductive coupling of energy from the coil into the processing space. The location of the coil in the plane of the target or behind the target allows the target to wafer spacing to be chosen to optimize film deposition rate and uniformity, and also provides for the advantages of a ring-shaped source without the problems associated with unwanted deposition in the opening at the target center.
    Type: Grant
    Filed: May 6, 1998
    Date of Patent: June 27, 2000
    Assignee: Tokyo Electron Limited
    Inventors: John S. Drewery, Thomas J. Licata
  • Patent number: 5800688
    Abstract: An ionized physical vapor deposition apparatus is provided with a helical RF coil that surrounds the chamber wall opposite a space between a target and a substrate holder. The coil is behind a quartz window in the wall of the chamber, which protects the coil from adverse interaction with plasma. The coil is energized with RF energy, preferably in the 0.1 to 60 MHz range, to form a secondary plasma in a volume of the space between the substrate holder and the main plasma that is adjacent the target. A shield between the space and the dielectric material prevents coating from forming on the window. The shield is formed of a plurality of angled sections that are spaced to facilitate communication of a secondary RF plasma from adjacent the window to the volume of the chamber where the sputtered material is ionized, with the sections angled and spaced to shadow at least most of the target from the window.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: September 1, 1998
    Assignee: Tokyo Electron Limited
    Inventors: Alexander D. Lantsman, Thomas J. Licata
  • Patent number: 5576579
    Abstract: A multilayer structure having an oxygen or dopant diffusion barrier fabricated of an electrically conductive, thermally stable material of refractory metal-silicon-nitrogen which is resistant to oxidation, prevents out-diffusion of dopants from silicon and has a wide process window wherein the refractory metal is selected from Ta, W, Nb, V, Ti, Zr, Hf, Cr and Mo.
    Type: Grant
    Filed: January 12, 1995
    Date of Patent: November 19, 1996
    Assignee: International Business Machines Corporation
    Inventors: Paul D. Agnello, Cyril Cabral, Jr., Alfred Grill, Christopher V. Jahnes, Thomas J. Licata, Ronnen A. Roy
  • Patent number: 5545590
    Abstract: An improved method of forming interlayer interconnections employs the same material (or materials that are etched similarly) for both the stud and the upper interconnect in which the stud is surrounded by a collar of conductive material that is also resistant to the etching process used to define the upper wire interconnect.
    Type: Grant
    Filed: August 29, 1994
    Date of Patent: August 13, 1996
    Assignee: International Business Machines Corporation
    Inventor: Thomas J. Licata
  • Patent number: 5466626
    Abstract: The subject invention provides a method of forming recesses in a substrate such as a capacitor so as to increase the surface area thereof and therefore the charge storage capacity of the capacitor. This is accomplished by utilizing a micro mask formed by agglomeration on the surface of the substrate. The agglomerated material, such as gold, titanium nitride or titanium silicide, is used as a mask for selectively etching the substrate to form recesses therein. Alternatively, an oxide transfer mask can be utilized with the agglomerated material micro mask to etch the substrate.
    Type: Grant
    Filed: December 16, 1993
    Date of Patent: November 14, 1995
    Assignee: International Business Machines Corporation
    Inventors: Michael Armacost, A. Richard Baker, Jr., Wayne S. Berry, Daniel A. Carl, Donald M. Kenney, Thomas J. Licata
  • Patent number: 5401675
    Abstract: A process for sputter deposition wherein high aspect ratio apertures are coated with conductive films exhibiting low bulk resistivity, low impurity concentrations, and regular morphologies. A collimator is used having an aspect ratio that approximates the aspect ratio of the apertures.
    Type: Grant
    Filed: March 24, 1993
    Date of Patent: March 28, 1995
    Inventors: Pei-Ing P. Lee, Thomas J. Licata, Thomas L. McDevitt, Paul C. Parries, Scott L. Pennington, James G. Ryan, David C. Strippe
  • Patent number: 5356837
    Abstract: An epitaxial cobalt silicide film is formed using a thin metal underlayer, which is placed underneath a cobalt layer prior to a heating step which forms the silicide film. More specifically, a refractory metal layer comprising tungsten, chromium, molybdenum, or a silicide thereof, is formed overlying a silicon substrate on a semiconductor wafer. A cobalt layer is formed overlying the refractory metal layer. Next, the wafer is annealed at a temperature sufficiently high to form an epitaxial cobalt silicide film overlying the silicon substrate. Following this annealing step, a cobalt-silicon-refractory metal alloy remains overlying the epitaxial cobalt silicide film. This silicide is then used to form a shallow P-N junction by dopant out-diffusion. First, either a P or N-type dopant is implanted into the silicide film so that substantially none of the dopant is implanted into the underlying silicon substrate.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: October 18, 1994
    Assignee: International Business Machines Corporation
    Inventors: Peter J. Geiss, Thomas J. Licata, Herbert L. Ho, James G. Ryan