Patents by Inventor Thomas J. Magee

Thomas J. Magee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030060020
    Abstract: The present invention relates to the manufacture of substrates for semiconductor device manufacturing particularly for applications that involved wafer-to-wafer bonding for SOI or MEMS structures. Although previous techniques have been applicable to single crystal wafers using bonding and annealing, the current techniques offer the unique capability of utilizing lower cost semiconductor materials, even when they contain dislocations or other growth associated stress fields; such as poly or multi-crystalline silicon and seed, or tail ends of CZ or FZ grown ingots. This invention provides a means of obtaining superior global and local flatness, along with nanoscale roughness variations across the surfaces so that cost and throughput are optimized.
    Type: Application
    Filed: October 11, 2001
    Publication date: March 27, 2003
    Applicant: Silicon Evolution, Inc.
    Inventors: Hans Walitzki, Claudian Nicolesco, Thomas J. Magee, Howard W. Hogle
  • Publication number: 20020187595
    Abstract: A method for the production of silicon-on-insulator (SOI) wafers for controlling the device layer thickness variations and improvement of bonding quality at the interface of the wafers is disclosed. Using standard etched wafers, a unique sequence of process steps consisting of 2-step front side grinding, free-floating simultaneous double side polishing prepares wafers with low TTV and reduced edge roll off zones. The much smaller unbonded edge zone eliminates the requirements for edge grinding or etching in most cases. When the same s-step grinding/FFS-DSP sequence is applied after bonding and annealing of a Silicon-on-Insulator package, the resulting thickness variation in the device layer is usually smaller than what would be obtained from prior art processes.
    Type: Application
    Filed: October 30, 2001
    Publication date: December 12, 2002
    Applicant: Silicon Evolution, Inc.
    Inventors: Hans J. Walitzki, Kurt U. Dichmann, Thomas J. Magee, Claudian Nicolesco
  • Patent number: 5151135
    Abstract: The invention relates to a new method for cleaning chemical, metallic and particulate contaminants from solid surfaces. The new method comprises irradiating the surface with essentially ultraviolet laser radiation whose parameters are selected to avoid causing substantial chemical or physical change at the surface.
    Type: Grant
    Filed: September 15, 1989
    Date of Patent: September 29, 1992
    Assignee: Amoco Corporation
    Inventors: Thomas J. Magee, Charles S. Leung, Richard L. Press
  • Patent number: 4758533
    Abstract: Nonrefractory micrometer-thick deposited metal or metallization, for example, aluminum and aluminum alloy films, on integrated circuits are planarized by momentarily melting them with optical pulses from a laser, such as a xenon chloride excimer laser. The substrate, as well as any intervening dielectric and conducive layers, are preheated to preferably one-half the melting temperature of the metal to be planarized, thereby enhancing reflow of the metal upon melting. This improves planarization and reduces stress in the resolidified metal. Laser planarization offers an attractive technique for fabricating multilayer interconnect structures, particularly where a number of ground or power planes are included. Excellent step coverage and via filling is achieved without damaging lower layers of interconnect.
    Type: Grant
    Filed: September 22, 1987
    Date of Patent: July 19, 1988
    Assignee: XMR Inc.
    Inventors: Thomas J. Magee, John F. Osborne, Peter Gildea, Charles H. Leung
  • Patent number: 4147564
    Abstract: A method of forming a microscopically texturized surface on a crystalline semiconductor material is disclosed which method includes the use of a radioactive source for uniformly irradiating the surface. The radioactive source includes a plane surface having a uniform distribution of radioactive material thereon In one arrangement the radioactive source surface area is at least the size of the polished crystalline semiconductor surface to be texturized, and the radioactive source is positioned closely adjacent the polished surface for a predetermined time period for uniform irradiation of the same. If desired, the radioactive source and crystalline surface may be relatively movable during irradiation of the surface, in which case the source may be in the form of an elongated strip of sufficient length to extend beyond opposite edges of the polished surface area to be texturized.
    Type: Grant
    Filed: November 18, 1977
    Date of Patent: April 3, 1979
    Assignee: SRI International
    Inventors: Thomas J. Magee, Richard R. Pettijohn, Shelley A. Stewart, Malcolm Thackray
  • Patent number: 3972032
    Abstract: There is provided a method and means for establishing storage sites in photodichroic materials using ion implantation.
    Type: Grant
    Filed: September 9, 1974
    Date of Patent: July 27, 1976
    Assignee: Stanford Research Institute
    Inventors: Thomas J. Magee, Matt Lehmann