Abstract: This apparatus stops the clock for a processor partition consisting of a group of processor units in response to detection and classification of an error in a processor unit which can cause a cascade of errors in the partition group.

Abstract: An insulated electrical lead has a first section of insulation extending along the lead which is made of a first material and a second section of insulation extending along the lead which is made of a second material. The second material is softer and less stiff than the first material.

Abstract: An apparatus disposed within a computer system is disclosed for sensing the existence of an error occurring within a computer system and for suspending an internal system clock when a certain number of clock pulses are generated following the occurrence of the error. When the internal system clock is suspended, operation of the computer system stops. In the preferred embodiment, the internal system clock is suspended when two (2) clock pulses are generated following the occurrence of the error. As a result, it is not necessary to wait until execution of the current instruction is complete before stopping the operation of the computer system. Therefore, other errors are not generated within the computer system as a result of the generation of the initial error.

Abstract: A central clock signal generator generates a plurality of odd and even clock pulses which are distributed to a plurality of logic and circuit modules by clock signal lines of equal length. The central signal generator also generates a plurality of gate pulses which are supplied to the modules on signal lines which can be different in length from one to another. The gate pulses are wide enough to coincide with the clock pulses with appropriate allowance for skew between the pulses. For each pair of pulses engaged delivered to a module a detection circuit is provided which detects if the gate pulse and the clock pulse begin and end in the proper sequence. If an improper sequence occurs, the information is stored in a scannable latch and a machine stop control is generated. The exact failing module can be traced readily from the information supplied in this manner.