Abstract: A two-way digital radio telephone system includes means for transmitting by RF carrier 16 bit binary words including a start bit, a six bit identification code and eight bits of information comprising either an audio sample or a function code, as indicated by an audio/function bit. The carrier is detected and each word serially loaded into a receive shift register which is parallelly unloaded with the identification code being supplied to a comparator and the information data being supplied to a D/A converter. If the comparator yields an identity with the predetermined 6 bit identification code, a D/A converter output is supplied to an amplifier which feeds a conventional telephone coil. The signal is retransmitted on another carrier by a parallelly loaded and serially unloaded transmit shift register which generates a similar binary word including an identification code, digitized audio or function data and the appropriate audio/function bit.

Abstract: An arrangement for storing user programmed system timing information in a microprogrammable system in the event of a power outage. The system includes a static random access memory (RAM) for periodically storing microprocessor-generated timing information and an electrically erasable programmable ROM (EEPROM) which is coupled to the static RAM for the temporary storage of this information in the event of a power outage. Also provided in the system is a power down sensor responsive to an AC-coupled power supply for detecting power loss to the system. When the input voltage drops below a predetermined value, the contents of the static RAM are automatically transferred to the nonvolatile EEPROM.

Abstract: A system for remotely controlling several devices in which both the indicia identifying the controlled device as well as the function indicia are generated by means of the selection of a single input control. A keyboard is bi-directionally scanned in detecting the user-selected input control signal. The control signal is then decoded to provide an indication of the function input signal as well as an indication of the particular device being addressed. The thus decoded signals are then used to generate a predetermined output pulse code for remotely controlling one of a plurality of functions in one of the plurality of controlled devices. The output pulse code includes a start bit (or bits) and various numbers and combinations of data bits depending upon the device addressed. The indicia identifying the controlled device are generated either by hard-wiring an address decoder to the user-operated input signal generator, i.e.

Abstract: A television receiver having two-way telephone capability includes a digitized talk channel and a digitized listen channel each having a gain-controlled amplifier selectively controlled by a switch controlled generator driven by the output of a subtraction circuit. Multipliers are connected to the inputs of the subtraction circuit and in turn receive respective inputs from their associated channels and from the other channels for offsetting cross coupled signals due to the telephone interface.

Abstract: A television receiver incorporating telephone interface circuitry permitting the viewer to remotely place outgoing calls by recalling a selected number from memory is disclosed. An infrared link is used for remotely answering incoming calls, initiating outgoing calls and programming a nonvolatile memory with a plurality of preferred telephone numbers for future use. The nonvolatile memory circuit is accessed by means of a microcomputer in response to user-initiated, remotely generated commands. The television receiver's display performs a user interactive function in displaying television/telephone mode operation information, the contents of user-accessed locations in the nonvolatile memory and the telephone number being stored in memory during the programming mode of operation.

Abstract: A pulse code modulated (PCM) infrared (IR) remote control detector/decoder with improved noise immunity particularly adapted for use with a television receiver is disclosed. The IR pulses are modulated by means of a high frequency clock signal in translating the transmitted signal to a higher frequency, more noise immune portion of the IR spectrum. After receipt of the transmitted signal by a signal detector, the high frequency modulation is removed from the pulses which are then decoded. Under the control of a microcomputer, the decoder looks for the start data bit and, if received, the subsequent control instructions. When the data transmission has been decoded, the microcomputer activates the appropriate control outputs to the television receiver's tuner system to achieve the desired control function.

Abstract: A character generator driven by a microcomputer and providing latched outputs is disclosed. Flexibility in character size and character array positioning on the video display is provided for in this 60-character display generator integrated circuit. A plurality of latched outputs permits the character generator to perform additional functions while reducing the number of dedicated microcomputer outputs required to perform these and similar functions. The character generator is particularly adapted for use in a television receiver where characters are displayed on the face of the cathode ray tube.

Abstract: A television/telephone loudspeaker system is disclosed wherein feedback oscillation caused by having a speaker phone system simultaneously in the transmit and receive mode is minimized. Improved separation of transmit and receive signals is accomplished by microprocessor-controlled dynamic balancing of a bridge network coupled to a telephone isolation transformer to which the incoming and outgoing calls are provided. In addition, by microprocessor sampling of the television receiver's loudspeaker drive voltage from the telephone input line, dynamic proportional attenuation of microphone gain (AGC) is digitally accomplished in simulating full duplex operation. Bridge balancing is accomplished by means of test signals output by the microprocessor during quiet periods with various other audio signal refinements, such as room background noise cancellation, available with the constant monitoring of the microphone signal.

Abstract: A system for controlling a channel/band selective microcomputer programmed indirect frequency synthesis tuner is disclosed. Separate groups of VHF, UHF or CATV channels are programmed by means of a key switch having various positions of engagement corresponding to individual groups of channels. Following key switch selection of a given group of channels, any number of channels within that group may be programmed for viewing by means of channel UP and DOWN selector keys. A RAM is used to store "saved" and "skipped" channels for each key switch position. A backup non-volatile MNOS memory is provided for preserving stored data in the event AC power is removed. Also provided is programmable raster blanking for audio-only channels thus eliminating unwanted video snow. Front panel LED indicators inform the programmer of the status of each channel during television receiver programming.

Abstract: A television receiver incorporating telephone interface circuitry permitting the viewer to not only answer incoming calls but also place outgoing calls by means of the television receiver is disclosed. An infrared link is used for remote control telephone answering and dial-out with a tuner-integrated microcomputer used to drive a character generator permitting the number dialed to be displayed on the television receiver's video display and to be provided to a standard telephone line. An automatic re-dial feature is provided by means of the microcomputer's memory whereby the last phone number dialed by the remote transmitter may be stored in memory, recalled by means of a single button selection, presented on the on-screen display and automatically dialed.

Abstract: A limited-channel television tuning system includes a MNOS memory for storing tuning voltage information. Memory locations are addressed by channel address means through an encoder-decoder arrangement. The encoder supplies a clock-controlled channel address register for transferring the encoded address information to a comparator, which is also supplied directly with the encoded address information. The comparator outputs drive a delay circuit, consisting of a clocked flip flop AND gate arrangement, through a NOR gate. The output of the AND gate supplies a one-shot multivibrator for energizing the memory.