Patents by Inventor Thomas James Rogers

Thomas James Rogers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10629711
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: April 21, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Publication number: 20190341477
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Application
    Filed: July 16, 2019
    Publication date: November 7, 2019
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Patent number: 10418468
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: September 17, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Publication number: 20190074366
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Application
    Filed: November 7, 2018
    Publication date: March 7, 2019
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Patent number: 10170602
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: January 1, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Publication number: 20180190801
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Application
    Filed: February 27, 2018
    Publication date: July 5, 2018
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Patent number: 9905678
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: February 27, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Patent number: 9741834
    Abstract: A transistor includes a sub-collector, a base, a collector between the sub-collector and the base, and an emitter on the base opposite the collector. The collector includes a first region adjacent to the base and a second region between the first region and the sub-collector. The first region has a graduated doping profile such that a doping concentration of the first region decreases in proportion to a distance from the base. The second region has a substantially constant doping profile. By providing the collector with a doping profile as described, the linearity of the transistor is significantly improved while maintaining the radio frequency (RF) gain thereof.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: August 22, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Jing Zhang, Thomas James Rogers
  • Publication number: 20170236925
    Abstract: The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
    Type: Application
    Filed: August 15, 2016
    Publication date: August 17, 2017
    Inventors: Peter J. Zampardi, Brian G. Moser, Thomas James Rogers
  • Patent number: 9502510
    Abstract: The present disclosure relates to heterojunction bipolar transistors for improved radio frequency (RF) performance. In this regard, a heterojunction bipolar transistor includes a base, an emitter, and a collector. The base is formed over the collector such that a base-collector junction is formed between the base and the collector. The base-collector junction is configured to become forward-biased at a first turn-on voltage. The emitter is formed over the base such that a base-emitter junction is formed between the base and the emitter. The base-emitter junction is configured to become forward-biased at a second turn-on voltage, as opposed to the first turn-on voltage. Notably, the second turn-on voltage is lower than the first turn-on voltage.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: November 22, 2016
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Jing Zhang, Thomas James Rogers, Dheeraj Mohata
  • Publication number: 20160293700
    Abstract: A transistor includes a sub-collector, a base, a collector between the sub-collector and the base, and an emitter on the base opposite the collector. The collector includes a first region adjacent to the base and a second region between the first region and the sub-collector. The first region has a graduated doping profile such that a doping concentration of the first region decreases in proportion to a distance from the base. The second region has a substantially constant doping profile. By providing the collector with a doping profile as described, the linearity of the transistor is significantly improved while maintaining the radio frequency (RF) gain thereof.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 6, 2016
    Inventors: Peter J. Zampardi, Brian G. Moser, Jing Zhang, Thomas James Rogers
  • Publication number: 20150372098
    Abstract: The present disclosure relates to heterojunction bipolar transistors for improved radio frequency (RF) performance. In this regard, a heterojunction bipolar transistor includes a base, an emitter, and a collector. The base is formed over the collector such that a base-collector junction is formed between the base and the collector. The base-collector junction is configured to become forward-biased at a first turn-on voltage. The emitter is formed over the base such that a base-emitter junction is formed between the base and the emitter. The base-emitter junction is configured to become forward-biased at a second turn-on voltage, as opposed to the first turn-on voltage. Notably, the second turn-on voltage is lower than the first turn-on voltage.
    Type: Application
    Filed: June 19, 2015
    Publication date: December 24, 2015
    Inventors: Peter J. Zampardi, Brian G. Moser, Jing Zhang, Thomas James Rogers, Dheeraj Mohata