Abstract: A computer system having two or more controllers operating in a Master/Slave configuration is disclosed. In one embodiment, the computer system includes: a sensor panel having a first portion for generating a first set of sense signals indicative of a touch or no-touch condition on the first portion, and a second portion for generating a second set of sense signals indicative of a touch or no-touch condition on the second portion; a first device for receiving and processing the first set of output signals from the first portion of the panel; and a second device for receiving and processing the second set of output signals from the second portion of the panel, wherein the first and second devices operate cooperatively in a Master/Slave configuration.

Abstract: A device that can autonomously scan a sensor panel is disclosed. Autonomous scanning can be performed by implementing channel scan logic. In one embodiment, channel scan logic carries out many of the functions that a processor would normally undertake, including generating timing sequences and obtaining result data; comparing scan result data against a threshold value (e.g., in an auto-scan mode); generating row count; selecting one or more scanning frequency bands; power management control; and performing an auto-scan routine in a low power mode.

Abstract: A device that can autonomously scan a sensor panel is disclosed. Autonomous scanning can be performed by implementing channel scan logic. In one embodiment, channel scan logic carries out many of the functions that a processor would normally undertake, including generating timing sequences and obtaining result data; comparing scan result data against a threshold value (e.g., in an auto-scan mode); generating row count; selecting one or more scanning frequency bands; power management control; and performing an auto-scan routine in a low power mode.

Abstract: A device that can autonomously scan a sensor panel is disclosed. Autonomous scanning can be performed by implementing channel scan logic. In one embodiment, channel scan logic carries out many of the functions that a processor would normally undertake, including generating timing sequences and obtaining result data; comparing scan result data against a threshold value (e.g., in an auto-scan mode); generating row count; selecting one or more scanning frequency bands; power management control; and performing an auto-scan routine in a low power mode.

Abstract: A multi-stimulus controller for a multi-touch sensor is formed on a single integrated circuit (single-chip). The multi-stimulus controller includes a transmit oscillator, a transmit signal section that generates a plurality of drive signals based on a frequency of the transmit oscillator, a plurality of transmit channels that transmit the drive signals simultaneously to drive the multi-touch sensor, a receive channel that receives a sense signal resulting from the driving of the multi-touch sensor, a receive oscillator, and a demodulation section that demodulates the received sense signal based on a frequency of the receive oscillator to obtain sensing results, the demodulation section including a demodulator and a vector operator.

Abstract: Embodiments of the invention include an IC that includes a core used for ordinary operation and a thin power circuit. The thin power circuit can be configured to use very little power. The IC can also include a digital interface and a connection thereto. The IC can initiate transition to low power mode during which the core and various I/O pads can be shut down. However, the thin power circuit can be kept powered up. The thin power circuit can monitor the digital interface for a predefined wake up signal. When the wake up signal is detected, the thin power circuit can power up the core and any powered down I/O pads. The thin power circuit can also include a dedicated power on reset (POR) cell. This POR cell can be distinct than other POR cells used for the IC and can be specifically designed to for efficient operation.

Abstract: A channel scan architecture for detecting touch events on a touch sensor panel is disclosed. The channel scan architecture can combine drive logic, sense channels and channel scan logic on a single monolithic chip. The channel scan logic can be configured to implement a sequence of scanning processes in a panel subsystem without intervention from a panel processor. The channel scan architecture can provide scan sequence control to enable the panel processor to control the sequence in which individual scans are implemented in the panel subsystem. Type of scans that can be implemented in the panel subsystem can include a spectral analysis scan, touch scan, phantom touch scan, ambient light level scan, proximity scan and temperature scan.

Abstract: This relates to an architecture of a receive channel circuit used during both a spectrum analysis phase and a touch panel detection phase. Various components of the receive channel can be used during both the spectrum analysis phase and the touch panel detection phase. For example, a plurality of digital signal mixers used in the receive channel circuit can be used to demodulate signals during both a spectrum analysis phase and a touch sensor panel detection phase. In addition, the number of digital mixers needed in the receive channel can be reduced by dividing groups of signals to be demodulated into multiple sets of signals and demodulating each set at different times. Furthermore, the size of a sine look-up table (LUT) used to generate sine waveforms can be reduced by taking advantage of the symmetry of the sine waveform. For example, a quarter of a sine waveform can be saved in the LUT and the remaining quadrants of the waveform can be derived based on the symmetry of the sine wave.

Abstract: This is directed to allowing a processor of a device to use ordinary internal memory read and write instructions that read and write to external memory. Thus, the complexities associated with the existing methods of accessing external memory can be avoided. More specifically, an address space portion that does not correspond to any existing internal memory can be defined as associated with an external memory. When access to the external memory is required, the processor can simply issue ordinary internal memory read/write instructions that are addressed to the above mentioned address space. An interface controller can receive the read and write instructions and communicate with an external memory in order to execute them. The controller can then send a result back to the processor (if required) in the format that would be expected from an internal memory access operation.

Abstract: This relates to interface circuits for synchronous protocols which do not rely on a dedicated high frequency clock signal. Instead, the interface circuit may rely on a clock signal received over the interface from another device in order to transfer data between the interface and an internal buffer. Furthermore, the interface circuits can rely on a clock signal provided by a bus for a device the interface circuit is located in to transfer data between the internal buffer and the bus. The internal buffer can be, but is not limited to a FIFO. Alternatively, it can be a stack or another data structure. The internal buffer can be configured so that each of its multiple of cells is a shift register. Thus, a preparatory step of moving a byte of data from the buffer to a separate shift register can be avoided.

Abstract: An oscillating signal of relatively precise frequency can be generated by tuning an oscillator using an external stable oscillating source as a reference. Calibration logic can be included to compare a signal from the local oscillator to the reference signal and vary the local signal to a desired frequency. In one embodiment, the frequency of the local signal can be constantly or periodically compared with a threshold value and if the frequency exceeds the threshold value, the local oscillator can be modified to produce a signal having a frequency that is closer to a desired frequency.

Abstract: A touch controller for controlling a touch sensor panel is provided. The touch controller includes a plurality of sense channels that receive sensor signals from the touch sensor panel, a drive system that generates a plurality of stimulation signals based on a supply voltage on the order of digital logic level supply voltages, the stimulation signals for simultaneously stimulating multiple drive lines of the touch sensor panel, and a channel controller that controls the sense channels and the drive system. The plurality of sense channels, the drive system, and the channel controller are formed on a single chip.

Abstract: A method and system for accessing a computer system memory without processor intervention is disclosed. In one embodiment, the method includes initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface. The predetermined communication protocol enables an access operation to be performed on the first or second memory without intervention by the first or second processor. In one embodiment, the predetermined communication protocol utilizes a plurality of predefined packet types which are identified by a packet header decoder.

Abstract: A system and method for autonomously scanning a sensor panel device, such as a multi-touch panel, is disclosed. In one embodiment, the system and method disables a sensor panel processor after a first predetermined amount of time has elapsed without the sensor panel device sensing any events. One or more system clocks can also be disabled to conserve power. While the processor and one or more system clocks are disabled, the sensor panel device can periodically autonomously scan the sensor panel for touch activity. Accordingly, if one or more results from the autonomous scans exceed a threshold, the sensor panel device re-enables the processor and one or more clocks to actively scan the sensor panel. If the threshold is not exceeded, then the sensor panel device continues to periodically autonomously scan the sensor panel without intervention from the processor. Furthermore, the sensor panel device can periodically perform calibration functions to account for any drift that may be present in the system.

Abstract: A device that can autonomously scan a sensor panel is disclosed. Autonomous scanning can be performed by implementing channel scan logic. In one embodiment, channel scan logic carries out many of the functions that a processor would normally undertake, including generating timing sequences and obtaining result data; comparing scan result data against a threshold value (e.g., in an auto-scan mode); generating row count; selecting one or more scanning frequency bands; power management control; and performing an auto-scan routine in a low power mode.

Abstract: A method and system for managing power in a computer system is disclosed. In one embodiment the method includes providing output signals from a sensor panel to a controller, wherein the controller includes a data bus and a plurality of devices communicatively coupled to the data bus; monitoring an activity level on the data bus by monitoring bus access requests by one or more of the plurality of devices; and reducing or shutting off a bus clock frequency if there is reduced or no activity on the bus for a predetermined period of time.

Abstract: A computer system having two or more controllers operating in a Master/Slave configuration is disclosed. In one embodiment, the computer system includes: a sensor panel having a first portion for generating a first set of sense signals indicative of a touch or no-touch condition on the first portion, and a second portion for generating a second set of sense signals indicative of a touch or no-touch condition on the second portion; a first device for receiving and processing the first set of output signals from the first portion of the panel; and a second device for receiving and processing the second set of output signals from the second portion of the panel, wherein the first and second devices operate cooperatively in a Master/Slave configuration.

Abstract: An oscillating signal of relatively precise frequency is generated by tuning an oscillator using an external stable oscillating source as a reference. Calibration logic is included to compare a signal from the local oscillator to the reference signal and vary the local signal to a desired frequency. In one embodiment, a binary search algorithm is used to tune the local oscillator. The local oscillating signal can be sent to one or more circuits including at least one sensor of a touch sensitive panel for detecting touch events.

Abstract: Embodiments of the present invention are directed to a microcontroller which includes a Register Load Assist engine. The microcontroller can include no or minimal non-volatile memory which stores boot data. Thus, most of the boot data can be stored at a non-volatile memory external to the microcontroller. An external circuit can read the externally positioned non-volatile memory and send compressed boot data to the microcontroller. The boot data can be originally stored in compressed form in the external non-volatile memory or it can be compressed by the external circuit. The boot data can be received by the microcontroller and saved in an intermediate location in the microcontroller's internal volatile memory. The RLA engine can then uncompress the boot data and store various portions of it in their final destinations (such as, for example, in respective registers).

Abstract: Disclosed is an electronic device featuring a multi buffer scheme for processing incoming signals. For example, two buffers can be used. A processor can read and process stored signals from a first buffer while an incoming data module can concurrently store signals in a second buffer. Once, the processor is done, it can move on to the second buffer and process signals stored therein while the incoming data module stores signals in the first buffer. Also provided is a flagging scheme for allowing the processor and the incoming data module to control their respective access to the various buffers, so that only one of them accesses a single buffer at any time.