Patents by Inventor Thomas Joseph Krutsick

Thomas Joseph Krutsick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8542848
    Abstract: The present invention provides embodiments of a musical instrument preamplifier. It is especially suited to acoustic and electric guitars and basses. All components, including the power source, are contained within or on the body of the instrument. The preamplifier dubbed BPTD (for Battery Powered Tube Driver) contains a vacuum tube input stage and may utilize a second stage consisting of either a vacuum tube or semiconductor device, such as a JFET. Circuitry is included to bias the cathode heater and the preamplifier circuit with no dangerous high voltages present. The tube may be mounted on the instrument body to provide for a pleasing display.
    Type: Grant
    Filed: August 10, 2008
    Date of Patent: September 24, 2013
    Inventor: Thomas Joseph Krutsick
  • Patent number: 8012775
    Abstract: The present invention provides a method of forming an optically triggered switch. Embodiments of the method include forming a silicon layer, forming one or more trenches in the silicon layer, and forming one or more silicon diodes in the silicon layer. Embodiments of the method also include forming a first thyristor in the silicon layer such that the first thyristor is physically and electrically isolated from the silicon diode(s) by the trench(es). The first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode(s).
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: September 6, 2011
    Assignee: Zarlink Semiconductor (US), Inc.
    Inventor: Thomas Joseph Krutsick
  • Patent number: 7821016
    Abstract: The present invention provides an optically triggered switch and a method of forming the optically triggered switch. The optically triggered switch includes a silicon layer having at least one trench formed therein and at least one silicon diode formed in the silicon layer. The switch also includes a first thyristor formed in the silicon layer. The first thyristor is physically and electrically isolated from the silicon diode by the trench and the first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: October 26, 2010
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: Thomas Joseph Krutsick
  • Patent number: 7715162
    Abstract: The present invention provides a method and apparatus for providing electro-static discharge (ESD) protection between a first and a second circuit node. One embodiment of the ESD protection circuit includes one or more steering diodes that generate electromagnetic radiation and couple the first circuit node to ground in response to a voltage applied to the first circuit node. The ESD protection circuit also includes a latch circuit that couples the first circuit node to ground in response to the electromagnetic radiation generated by the steering diode(s).
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: May 11, 2010
    Assignee: Zarlink Semiconductor (US) Inc.
    Inventor: Thomas Joseph Krutsick
  • Patent number: 7605010
    Abstract: The present invention provides an optical isolator and a method of forming the optical isolator. Embodiments of the optical isolator include a silicon layer having at least one trench formed therein. The trench has a resistance that varies in response to electromagnetic radiation. Embodiments of the optical isolator also include at least one first diode formed in the silicon layer such that the trench encompasses the first diode. The first diode is configured to generate electromagnetic radiation in response to an applied signal. Embodiments of the optical isolator further include first and second regions formed in contact with the trench such that the resistance between the first and second contact regions varies in response to the electromagnetic radiation generated by the first diode.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: October 20, 2009
    Assignee: Zarlink Semiconductor US, Inc.
    Inventor: Thomas Joseph Krutsick
  • Publication number: 20090250785
    Abstract: The disclosed subject matter provides a method of forming a bipolar transistor. The method includes depositing a first insulating layer over a first layer of material that is doped with a dopant of a first type. The first layer is formed over a substrate. The method also includes modifying a thickness of the first oxide layer based on a target dopant profile and implanting a dopant of the first type in the first layer. The dopant is implanted at an energy selected based on the modified thickness of the first insulating layer and the target dopant profile.
    Type: Application
    Filed: April 2, 2008
    Publication date: October 8, 2009
    Inventors: Thomas Joseph Krutsick, Christopher J. Speyer
  • Publication number: 20090230476
    Abstract: The present invention provides a method and apparatus for providing electrostatic discharge (ESD) protection between a first and a second circuit node. One embodiment of the ESD protection circuit includes one or more steering diodes that generate electromagnetic radiation and couple the first circuit node to ground in response to a voltage applied to the first circuit node. The ESD protection circuit also includes a latch circuit that couples the first circuit node to ground in response to the electromagnetic radiation generated by the steering diode(s).
    Type: Application
    Filed: March 12, 2008
    Publication date: September 17, 2009
    Inventor: Thomas Joseph Krutsick