Patents by Inventor Thomas Keena

Thomas Keena has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Monolithic series switching semiconductor device having low-resistance substrate contact structure and method
    Patent number: 10032937
    Abstract: A semiconductor device structure includes a region of semiconductor material with a first major surface and an opposing second major surface. A contact structure is disposed in a first portion of the region of semiconductor material and includes a tub structure extending from adjacent a first portion of the first major surface. A plurality of structures comprising portions of the region of semiconductor material extend outward from a lower surface of the tub structure. In some embodiments, the plurality of structures comprises a plurality of free-standing structures. A conductive material is disposed within the tub structure and laterally surrounding the plurality of structures. In one embodiment, the contact structure facilitates the fabrication of a monolithic series switching diode structure having a low-resistance substrate contact.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: July 24, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Ali Salih, Gordon M. Grivna, Daniel R. Heuttl, Osamu Ishimaru, Thomas Keena, Masafumi Uehara
  • MONOLITHIC SERIES SWITCHING SEMICONDUCTOR DEVICE HAVING LOW-RESISTANCE SUBSTRATE CONTACT STRUCTURE AND METHOD
    Publication number: 20180138319
    Abstract: A semiconductor device structure includes a region of semiconductor material with a first major surface and an opposing second major surface. A contact structure is disposed in a first portion of the region of semiconductor material and includes a tub structure extending from adjacent a first portion of the first major surface. A plurality of structures comprising portions of the region of semiconductor material extend outward from a lower surface of the tub structure. In some embodiments, the plurality of structures comprises a plurality of free-standing structures. A conductive material is disposed within the tub structure and laterally surrounding the plurality of structures. In one embodiment, the contact structure facilitates the fabrication of a monolithic series switching diode structure having a low-resistance substrate contact.
    Type: Application
    Filed: November 11, 2016
    Publication date: May 17, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Ali SALIH, Gordon M. GRIVNA, Daniel R. HEUTTL, Osamu ISHIMARU, Thomas KEENA, Masafumi UEHARA
  • Method of forming a semiconductor device and structure therefor
    Patent number: 9520388
    Abstract: In one embodiment, a semiconductor device may include a first transistor having a first current carrying electrode, a second current carrying electrode, and a control electrode; a first bipolar transistor having a collector coupled to the first current carrying electrode of the first transistor, a base coupled to the second current carrying electrode of the first transistor, and an emitter of the first bipolar transistor coupled to a first node of the semiconductor device. In an embodiment, the first node is connected to a terminal of a semiconductor package. An embodiment may include a semiconductor component coupled between the base of the first bipolar transistor and the emitter of the second bipolar transistor.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: December 13, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: David M. Heminger, Thomas Keena
  • METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
    Publication number: 20160126236
    Abstract: In one embodiment, a semiconductor device may include a first transistor having a first current carrying electrode, a second current carrying electrode, and a control electrode; a first bipolar transistor having a collector coupled to the first current carrying electrode of the first transistor, a base coupled to the second current carrying electrode of the first transistor, and an emitter of the first bipolar transistor coupled to a first node of the semiconductor device. In an embodiment, the first node is connected to a terminal of a semiconductor package. An embodiment may include a semiconductor component coupled between the base of the first bipolar transistor and the emitter of the second bipolar transistor.
    Type: Application
    Filed: November 3, 2014
    Publication date: May 5, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: David M. HEMINGER, Thomas KEENA
  • Two terminal multi-channel ESD device and method therefor
    Patent number: 8110448
    Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: February 7, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Ali Salih, Mingjiao Liu, Thomas Keena
  • Method of forming low capacitance ESD device and structure therefor
    Patent number: 8039359
    Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: October 18, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Thomas Keena, Ki Chang, Francine Y. Robb, Mingjiao Liu, Ali Salih, John Michael Parsey, Jr., George Chang
  • TWO TERMINAL MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR
    Publication number: 20100311211
    Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes.
    Type: Application
    Filed: August 17, 2010
    Publication date: December 9, 2010
    Inventors: Ali Salih, Mingjiao Liu, Thomas Keena
  • Two terminal low capacitance multi-channel ESD device
    Patent number: 7812367
    Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: October 12, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Ali Salih, Mingjiao Liu, Thomas Keena
  • TEMPERATURE COMPENSATED CURRENT SOURCE AND METHOD THEREFOR
    Publication number: 20100194465
    Abstract: In one embodiment, a temperature compensated current source includes a depletion mode transistor coupled in series with an active semiconductor device that adjust the depletion mode transistor to minimize variations in the current due to temperature changes.
    Type: Application
    Filed: February 2, 2009
    Publication date: August 5, 2010
    Inventors: Ali Salih, Thomas Keena, Jefferson W. Hall
  • TWO TERMINAL MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR
    Publication number: 20100090306
    Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes.
    Type: Application
    Filed: October 15, 2008
    Publication date: April 15, 2010
    Inventors: Ali Salih, Mingjiao Liu, Thomas Keena
  • Multi-channel ESD device and method therefor
    Patent number: 7579632
    Abstract: In one embodiment, an ESD device is configured to include a zener diode and a P-N diode.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: August 25, 2009
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Ali Salih, Mingjiao Liu, Sudhama C. Shastri, Thomas Keena, Gordon M. Grivna, John Michael Parsey, Jr., Francine Y. Robb, Ki Chang
  • METHOD OF FORMING LOW CAPACITANCE ESD DEVICE AND STRUCTURE THEREFOR
    Publication number: 20090162988
    Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
    Type: Application
    Filed: February 27, 2009
    Publication date: June 25, 2009
    Inventors: Thomas Keena, Ki Chang, Francine Y. Robb, Mingjiao Liu, Ali Salih, John Michael Parsey, JR., George Chang
  • Method of forming low capacitance ESD device and structure therefor
    Patent number: 7538395
    Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: May 26, 2009
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Thomas Keena, Ki Chang, Francine Y. Robb, Mingjiao Liu, Ali Salih, John Michael Parsey, Jr., George Chang
  • METHOD OF FORMING LOW CAPACITANCE ESD DEVICE AND STRUCTURE THEREFOR
    Publication number: 20090079022
    Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 26, 2009
    Inventors: Thomas Keena, Ki Chang, Francine Y. Robb, Mingjiao Liu, Ali Salih, John Michael Parsey, JR., George Chang
  • MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR
    Publication number: 20090079001
    Abstract: In one embodiment, an ESD device is configured to include a zener diode and a P-N diode.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 26, 2009
    Inventors: Ali Salih, Mingjiao Liu, Sudhama C. Shastri, Thomas Keena, Gordon M. Grivna, John Michael Parsey, JR., Francine Y. Robb, Ki Chang