Patents by Inventor Thomas Kim

Thomas Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964035
    Abstract: The present disclosure relates to, inter alia, a gel formulation in a package, the package may be pressurized. The formulation comprises one or more active agents and is co-mingled with a gas propellant prior to being filled under pressure into the package. The gas propellant is added in sufficient amounts to be dispersed in the formulation; the pressurized package is under sufficient pressure suitable to maintain the first gas propellant dispersed in the formulation. The pressurized package is under sufficient pressure to expel the formulation as a whipped gel formulation upon application of external force on the formulation in the package. The present disclosure also relates to, inter alia, a method of preparing the disclosed formulation; a package comprising the disclosed formulation, and a method of using the disclosed formulation.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: April 23, 2024
    Assignees: BEIERSDORF AG, Formulated Solutions, LLC
    Inventors: Stephen Baldwin, Nanhye Kim, Tom Meyer, Eric Dann, Thomas Dann, Renee Nelson, Brian Dann, Anna Erixon
  • Patent number: 11961970
    Abstract: A lithium sulfur battery with a low solvating electrolyte at an amount of less than 2 ?l per mg sulfur. The electrolyte comprises dioxolane and hexylmethylether, as well as a Li salt, for example LiTSFi. The electrolyte is free from lithium nitrate, LiNO3.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: April 16, 2024
    Assignee: SCEYE SA
    Inventors: Mikkel Vestergaard Frandsen, David Kim, Holger Althues, Paul Hartel, Thomas Abendroth, Susanne Dörfler, Benjamin Schumm, Stefan Kaskel, Christine Weller
  • Publication number: 20240115704
    Abstract: Provided herein are, among other things, methods for treating a patient suffering from a CD38+ cancer.
    Type: Application
    Filed: April 6, 2022
    Publication date: April 11, 2024
    Inventors: Peter FLYNN, Jason B. LITTEN, Thomas James FARRELL, John Kin Chuan LIM, Mili MANDAL, Srinivas Sai SOMANCHI, Yusun KIM, Sungyoo CHO, Yu Kyeong HWANG
  • Patent number: 11952389
    Abstract: The present invention discloses compounds of Formula (I), or pharmaceutically acceptable salts, esters, or prodrugs thereof: which inhibit Respiratory Syncytial Virus (RSV). The present invention further relates to pharmaceutical compositions comprising the aforementioned compounds for administration to a subject suffering from RSV infection. The invention also relates to methods of treating an RSV infection in a subject by administering a pharmaceutical composition comprising the compounds of the present invention.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: April 9, 2024
    Assignee: Enanta Pharmaceuticals, Inc.
    Inventors: Brian C. Shook, In Jong Kim, Thomas P. Blaisdell, Jianming Yu, Joseph D. Panarese, Yat Sun Or
  • Patent number: 11955646
    Abstract: A supported catalyst includes: (1) a catalyst support; and (2) deposits of a catalyst covering the catalyst support, wherein the deposits have an average thickness of about 2 nm or less, and the deposits are spaced apart from one another.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: April 9, 2024
    Assignees: The Board of Trustees of the Leland Stanford Junior University, Volkswagen Aktiengesellschaft
    Inventors: Friedrich B. Prinz, Thomas Jaramillo, Drew C. Higgins, Yongmin Kim, Shicheng Xu, Thomas Schladt, Tanja Graf
  • Publication number: 20240113217
    Abstract: An integrated circuit includes first and second trenches in a semiconductor substrate and a semiconductor mesa between the first and second trenches. A source region having a first conductivity type and a body region having an opposite second conductivity type are located within the semiconductor mesa. A trench shield is located within the first trench, and a gate electrode is over the trench shield between first and second sidewalls of the first trench. A gate dielectric is on a sidewall of the first trench between the gate electrode and the body region, and a pre-metal dielectric (PMD) layer is over the gate electrode. A gate contact through the PMD layer touches the gate electrode between the first and second sidewalls, and a trench shield contact through the PMD layer touches the trench shield between the first and second sidewalls.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Hong Yang, Thomas Grebs, Yunlong Liu, Sunglyong Kim, Lindong Li, Peng Li, Seetharaman Sridhar, Yeguang Zhang, Sheng pin Yang
  • Publication number: 20240105456
    Abstract: A method of forming a semiconductor device includes pretreating a semiconductor substrate including at least one buried power rail for power transmission, based on chemical reaction by supplying a pretreatment gas for surface treatment onto a backside of the semiconductor substrate, forming at least one metal catalyst layer on the backside of the semiconductor substrate so as to be at least partially aligned with the at least one buried power rail, and forming at least one backside via hole by supplying an etchant to the semiconductor substrate to anisotropically etch the semiconductor substrate between the at least one metal catalyst layer and the at least one buried power rail while the at least one metal catalyst layer is descending into the semiconductor substrate by using metal assisted chemical etching (MACE).
    Type: Application
    Filed: September 7, 2023
    Publication date: March 28, 2024
    Inventors: Hanglim LEE, Minyoung KIM, Thomas Jongwan KWON
  • Patent number: 11936051
    Abstract: A catalyst structure includes: (1) a substrate; (2) a catalyst layer on the substrate; and (3) an adhesion layer disposed between the substrate and the catalyst layer. In some implementations, an average thickness of the adhesion layer is about 1 nm or less. In some implementations, a material of the catalyst layer at least partially extends into a region of the adhesion layer. In some implementations, the catalyst layer is characterized by a lattice strain imparted by the adhesion layer.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: March 19, 2024
    Assignees: The Board of Trustees of the Leland Stanford Junior University, Volkswagen Aktiengesellschaf
    Inventors: Friedrich B. Prinz, Shicheng Xu, Yongmin Kim, Thomas Jaramillo, Drew C. Higgins, Maha Yusuf, Zhaoxuan Wang, Kyung Min Lee, Marat Orazov, Dong Un Lee, Tanja Graf, Thomas Schladt, Gerold Huebner, Hanna-Lena Wittern, Jonathan Edward Mueller
  • Patent number: 11931386
    Abstract: Provided herein are compositions and methods for increasing butyrate production in a subject. In particular, provided herein are compositions, probiotic compositions, and combinations thereof that promote butyrate production in a subject.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: March 19, 2024
    Assignee: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Thomas M. Schmidt, Nielson Baxter, Kwi Kim, Alexander Schmidt, Arvind Venkataraman, Clive Waldron
  • Publication number: 20240088317
    Abstract: Approaches for fabricating one-dimensional metallization for solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a back surface and an opposing light-receiving surface. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the back surface of the substrate and parallel along a first direction to form a one-dimensional layout of emitter regions for the solar cell. A conductive contact structure is disposed on the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal lines corresponding to the plurality of alternating N-type and P-type semiconductor regions. The plurality of metal lines is parallel along the first direction to form a one-dimensional layout of a metallization layer for the solar cell.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: RICHARD HAMILTON SEWELL, DAVID FREDRIC JOEL KAVULAK, LEWIS ABRA, THOMAS P. PASS, TAESEOK KIM, MATTHIEU MOORS, BENJAMIN IAN HSIA, GABRIEL HARLEY
  • Patent number: 11927722
    Abstract: A transparent article is described herein that includes: a glass-ceramic substrate comprising first and second primary surfaces opposing one another and a crystallinity of at least 40% by weight; and an optical film structure disposed on the first primary surface. The optical film structure comprises a plurality of alternating high refractive index (RI) and low RI layers and a scratch-resistant layer. The article also exhibits an average photopic transmittance of greater than 80% and a maximum hardness of greater than 10 GPa, as measured by a Berkovich Hardness Test over an indentation depth range from about 100 nm to about 500 nm. The glass-ceramic substrate comprises an elastic modulus of greater than 85 GPa and a fracture toughness of greater than 0.8 MPa·?m. Further, the optical film structure exhibits a residual compressive stress of ?700 MPa and an elastic modulus of ?140 GPa.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 12, 2024
    Assignee: Corning Incorporated
    Inventors: Jaymin Amin, Jason Thomas Harris, Shandon Dee Hart, Chang-gyu Kim, Karl William Koch, III, Carlo Anthony Kosik Williams, Lin Lin, Dong-gun Moon, Jeonghong Oh, James Joseph Price, Charlene Marie Smith, Ananthanarayanan Subramanian, Ljerka Ukrainczyk, Tingge Xu
  • Patent number: 11922595
    Abstract: A method for execution by a computer generating a virtual reality environment utilizing a group of object representations by identifying an exclusion asset and modifying a set of common illustrative assets to exclude the exclusion asset to produce a redacted set of common illustrative assets. The method further includes rendering a portion of the redacted set of common illustrative asset to produce a redacted set of common illustrative asset video frames and selecting a subset of the redacted set of common illustrative asset video frames to produce a common portion of video frames for the virtual reality environment. The method further includes rendering representations of object representations to produce remaining portions of the video frames for the virtual reality environment. The method further includes linking the common portion and the remaining portions of the video frames to produce the virtual reality environment for interactive consumption.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: March 5, 2024
    Assignee: Enduvo, Inc.
    Inventors: Matthew Bramlet, Justin Douglas Drawz, Steven J. Garrou, Joseph Thomas Tieu, Joon Young Kim, Gary W. Grube
  • Publication number: 20240072142
    Abstract: Provided is a method of manufacturing a semiconductor device, the method including steps of providing a semiconductor substrate having one or more trenches, forming a gate insulating layer on the semiconductor substrate inside the trenches, and forming a buried gate electrode layer on the gate insulating layer to at least partially fill the trenches, wherein the step of forming the buried gate electrode layer includes a step of repeating a unit cycle a plurality of times, the unit cycle including an atomic layer deposition (ALD) process for forming a conductive layer on the gate insulating layer to serve as the buried gate electrode layer, and an atomic layer etching (ALE) process for preferentially etching portions of the conductive layer formed near the trenches and portions of the conductive layer formed on upper ends of the trenches over other portions of the conductive layer inside the trenches.
    Type: Application
    Filed: July 6, 2023
    Publication date: February 29, 2024
    Inventors: Thomas Jongwan KWON, Hae-won CHOI, Yunsang KIM
  • Publication number: 20240065414
    Abstract: The present invention concerns a dropper comprising a container and a head, the container extending between an open proximal end and a distal end along a longitudinal axis. The container delimiting a product storage inner volume. The head is tightly mounted at the proximal end to tightly close the proximal end. The head comprises an actuator and a deformable bulb mounted between the actuator and the proximal end. The deformable bulb defines an inner chamber with a variable volume. The actuator is mobile with regards to the container along an inclined direction, between a rest configuration, and a dispensing configuration in which the actuator deforms the bulb to decrease the volume of the inner chamber. The inclined direction comprises a non-null component along the longitudinal axis and a non-null component along a transverse axis perpendicular to the longitudinal axis.
    Type: Application
    Filed: January 6, 2021
    Publication date: February 29, 2024
    Inventors: Venkatesh SHEREGAR, Thomas OCONNOR, Jinseok KIM
  • Patent number: 11771898
    Abstract: A neurostimulation system senses electrographic signals from the brain of a patient, extracts features from the electrographic signals, and when the extracted features satisfy certain criteria, detects a neurological event type. A mapping function relates the detected neurological event type to a stimulation parameter subspace and a default stimulation parameter set where the values of the stimulation parameters define an instance of stimulation therapy for the patient. The decision whether to implement a stimulation parameter subspace or a default stimulation parameter set may be informed by integrating other information about a state of the patient. A stimulation parameter subspace or stimulation parameter set may optimized by testing it against various thresholds until certain effectiveness criteria is satisfied. The neurological event type may be one of several electrographic seizure onset types.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: October 3, 2023
    Assignee: NeuroPace, Inc.
    Inventors: Tara Leigh Crowder, Sharanya Arcot Desai, Martha Jo Morrell, Thomas Kim Tcheng, Ritu Kapur
  • Publication number: 20230019572
    Abstract: A neurostimulation system senses electrographic signals from the brain of a patient, extracts features from the electrographic signals, and when the extracted features satisfy certain criteria, detects a neurological event type. A mapping function relates the detected neurological event type to a stimulation parameter subspace and a default stimulation parameter set where the values of the stimulation parameters define an instance of stimulation therapy for the patient. The decision whether to implement a stimulation parameter subspace or a default stimulation parameter set may be informed by integrating other information about a state of the patient. A stimulation parameter subspace or stimulation parameter set may optimized by testing it against various thresholds until certain effectiveness criteria is satisfied. The neurological event type may be one of several electrographic seizure onset types.
    Type: Application
    Filed: September 16, 2022
    Publication date: January 19, 2023
    Inventors: Tara Leigh Crowder, Sharanya Arcot Desai, Martha Jo Morrell, Thomas Kim Tcheng, Ritu Kapur
  • Publication number: 20220398141
    Abstract: Techniques are disclosed for processing a workflow campaign. In some embodiments, a message processing service receives a first message that corresponds to a user arriving at a first node of the workflow campaign from a first message queue. The message processing service causes one or more actions associated with the first node to be performed with respect to the user. In addition, the message processing service determines that the first user should be progressed from the first node to a second node of the workflow campaign. The message processing service generates a second message that corresponds to the user arriving at the second node and determines a second message queue that is associated with the second node. The message processing service progresses the user from the first node to the second node by transmitting the second message to the second message queue.
    Type: Application
    Filed: June 14, 2022
    Publication date: December 15, 2022
    Inventors: Gregory Michael METHVIN, Thomas KIM, James CUMMINGS, Sean Edmund BURKE, Tse-Wen Tom WANG
  • Patent number: 11478642
    Abstract: A neurostimulation system senses electrographic signals from the brain of a patient, extracts features from the electrographic signals, and when the extracted features satisfy certain criteria, detects a neurological event type. A mapping function relates the detected neurological event type to a stimulation parameter subspace and a default stimulation parameter set where the values of the stimulation parameters define an instance of stimulation therapy for the patient. The decision whether to implement a stimulation parameter subspace or a default stimulation parameter set may be informed by integrating other information about a state of the patient. A stimulation parameter subspace or stimulation parameter set may optimized by testing it against various thresholds until certain effectiveness criteria is satisfied. The neurological event type may be one of several electrographic seizure onset types.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: October 25, 2022
    Assignee: NeuroPace, Inc.
    Inventors: Tara Leigh Crowder, Sharanya Arcot Desai, Martha Jo Morrell, Thomas Kim Tcheng, Ritu Kapur
  • Patent number: 11444043
    Abstract: Disclosed are substrates having an electronic component, including a frame having a through hole, the electronic component disposed in the through hole, a first wiring portion formed on a surface of the frame and the electronic component, a first layer formed on the first wiring portion, and a second wiring portion formed on the first layer, and the second wiring portion including an antenna layer.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: September 13, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hong In Kim, Thomas A Kim, Tae Sung Jeong
  • Patent number: 11165137
    Abstract: An antenna-integrated radio frequency (RF) module includes a multilayer substrate disposed between an integrated chip (IC) and patch antennas, signal vias, and ground members. The IC is configured to generate RF signals. The signal vias are configured to connect and transmit/receive the RF signals from each of the patch antennas to the IC. The ground members are disposed on an outer surface layer and intermediate surface layers of the multilayer substrate to surround each of the patch antennas and the signal vias.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: November 2, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hong In Kim, Thomas A. Kim, Ho Kyung Kang